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Commit 36e4dc48 authored by Stefan Lankes's avatar Stefan Lankes
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forward entry point to the startup code of the application processors

parent e96319ec
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......@@ -79,7 +79,8 @@ const SPURIOUS_INTERRUPT_NUMBER: u8 = 127;
/// The CS:IP addressing scheme is limited to 2^20 bytes (= 1 MiB).
const SMP_BOOT_CODE_ADDRESS: usize = 0x8000;
const SMP_BOOT_CODE_OFFSET_PML4: usize = 0x04;
const SMP_BOOT_CODE_OFFSET_PML4: usize = 0x10;
const SMP_BOOT_CODE_OFFSET_ENTRY: usize = 0x08;
const X2APIC_ENABLE: u64 = 1 << 10;
......@@ -450,8 +451,13 @@ pub fn boot_application_processors() {
paging::map::<BasePageSize>(SMP_BOOT_CODE_ADDRESS, SMP_BOOT_CODE_ADDRESS, 1, flags);
unsafe { ptr::copy_nonoverlapping(&SMP_BOOT_CODE as *const u8, SMP_BOOT_CODE_ADDRESS as *mut u8, SMP_BOOT_CODE.len()); }
// Pass the PML4 page table address to the boot code.
unsafe { *((SMP_BOOT_CODE_ADDRESS + SMP_BOOT_CODE_OFFSET_PML4) as *mut u32) = cr3() as u32; }
unsafe {
// Pass the PML4 page table address to the boot code.
*((SMP_BOOT_CODE_ADDRESS + SMP_BOOT_CODE_OFFSET_PML4) as *mut u32) = cr3() as u32;
// Set entry point
debug!("Set entry point for application processor to 0x{:x}", arch::x86_64::kernel::start::_start as u64);
*((SMP_BOOT_CODE_ADDRESS + SMP_BOOT_CODE_OFFSET_ENTRY) as *mut u64) = arch::x86_64::kernel::start::_start as u64;
}
// Now wake up each application processor.
let apic_ids = unsafe { CPU_LOCAL_APIC_IDS.as_ref().unwrap() };
......
......@@ -33,7 +33,6 @@
; (like the actual Rust entry point).
kernel_start equ 0x800000
CR0_PG equ (1 << 31)
CR4_PAE equ (1 << 5)
MSR_EFER equ 0xC0000080
......@@ -48,7 +47,8 @@ _start:
jmp _rmstart
; PARAMETERS
align 4
align 8
entry_point dq 0xDEADC0DE
pml4 dd 0xDEADBEEF
_rmstart:
......@@ -138,7 +138,7 @@ stublet:
mov cr4, eax
; Set the address to PML4 in CR3.
mov eax, [pml4]
mov eax, dword [pml4]
mov cr3, eax
; Enable x86-64 Compatibility Mode by setting EFER_LME.
......@@ -167,4 +167,4 @@ stublet:
ALIGN 8
start64:
; Jump to entry.asm
jmp kernel_start
jmp qword [entry_point]
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