Changed variable names in some tests such that they compatible with EmbeddedMontiArc.

parent 1d8e0f21
No preview for this file type
...@@ -41,7 +41,7 @@ ...@@ -41,7 +41,7 @@
<se-commons.version>1.7.7</se-commons.version> <se-commons.version>1.7.7</se-commons.version>
<mc.grammars.assembly.version>0.0.6</mc.grammars.assembly.version> <mc.grammars.assembly.version>0.0.6</mc.grammars.assembly.version>
<SIUnit.version>0.0.10-SNAPSHOT</SIUnit.version> <SIUnit.version>0.0.10-SNAPSHOT</SIUnit.version>
<Common-MontiCar.version>0.0.10-SNAPSHOT</Common-MontiCar.version> <Common-MontiCar.version>0.0.11-SNAPSHOT</Common-MontiCar.version>
<Math.version>0.0.11-SNAPSHOT</Math.version> <Math.version>0.0.11-SNAPSHOT</Math.version>
<!-- .. Libraries .................................................. --> <!-- .. Libraries .................................................. -->
......
architecture DuplicatedArgument(){ architecture DuplicatedArgument(){
def input Q(-oo:+oo)^{10} in def input Q(-oo:+oo)^{10} in1
def output Q(0:1)^{2} out def output Q(0:1)^{2} out1
in -> in1 ->
FullyConnected(units=64, units=32) -> FullyConnected(units=64, units=32) ->
Tanh() -> Tanh() ->
FullyConnected(units=2) -> FullyConnected(units=2) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture DuplicatedIONames(inputs=10, classes=2){ architecture DuplicatedIONames(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
def fc(){ def fc(){
FullyConnected(units=64) -> FullyConnected(units=64) ->
Tanh() Tanh()
} }
in -> in1 ->
fc() -> fc() ->
FullyConnected(units=classes) -> FullyConnected(units=classes) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture DuplicatedNames(inputs=10, inputs=10, classes=2){ architecture DuplicatedNames(inputs=10, inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
def fc(){ def fc(){
FullyConnected(units=64) -> FullyConnected(units=64) ->
...@@ -12,9 +12,9 @@ architecture DuplicatedNames(inputs=10, inputs=10, classes=2){ ...@@ -12,9 +12,9 @@ architecture DuplicatedNames(inputs=10, inputs=10, classes=2){
Tanh() Tanh()
} }
in -> in1 ->
fc() -> fc() ->
FullyConnected(units=classes) -> FullyConnected(units=classes) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture IllegalName(inputs=10, classes=2, Tg = 1){ architecture IllegalName(inputs=10, classes=2, Tg = 1){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
def Fc(){ def Fc(){
FullyConnected(units=10) FullyConnected(units=10)
} }
in -> in1 ->
FullyConnected(units=64) -> FullyConnected(units=64) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes) -> FullyConnected(units=classes) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture InvalidIOShape1(){ architecture InvalidIOShape1(){
def input Q(-oo:+oo)^{10, 2} in def input Q(-oo:+oo)^{10, 2} in1
def output Q(0:1)^{10, 2, 2, 2} out def output Q(0:1)^{10, 2, 2, 2} out1
in -> in1 ->
FullyConnected(units=64) -> FullyConnected(units=64) ->
Tanh() -> Tanh() ->
FullyConnected(units=10) -> FullyConnected(units=10) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture InvalidIOShape2(){ architecture InvalidIOShape2(){
def input Q(-oo:+oo)^{10.5} in def input Q(-oo:+oo)^{10.5} in1
def output Q(0:1)^{-10} out def output Q(0:1)^{-10} out1
in -> in1 ->
FullyConnected(units=64) -> FullyConnected(units=64) ->
Tanh() -> Tanh() ->
FullyConnected(units=10) -> FullyConnected(units=10) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture InvalidInputShape(inputs=10, classes=2){ architecture InvalidInputShape(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in[2] def input Q(-oo:+oo)^{inputs} in1[2]
def output Q(0:1)^{classes} out[2] def output Q(0:1)^{classes} out1[2]
in -> in1 ->
FullyConnected(units=64) -> FullyConnected(units=64) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes) -> FullyConnected(units=classes) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture MissingIO2(inputs=10, classes=2){ architecture MissingIO2(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in[2] def input Q(-oo:+oo)^{inputs} in1[2]
def output Q(0:1)^{classes} out[2] def output Q(0:1)^{classes} out1[2]
in[0] -> in1[0] ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Softmax() -> Softmax() ->
out[0] out1[0]
} }
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architecture MissingLayerOperator(){ architecture MissingLayerOperator(){
def input Q(-oo:+oo)^{10} in def input Q(-oo:+oo)^{10} in1
def output Q(0:1)^{2} out def output Q(0:1)^{2} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() Tanh()
FullyConnected(units=2, no_bias=true) FullyConnected(units=2, no_bias=true)
Softmax() -> Softmax() ->
out out1
} }
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architecture MissingMerge(inputs=10, classes=2){ architecture MissingMerge(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
( (
( (
FullyConnected(units=16) FullyConnected(units=16)
...@@ -20,5 +20,5 @@ architecture MissingMerge(inputs=10, classes=2){ ...@@ -20,5 +20,5 @@ architecture MissingMerge(inputs=10, classes=2){
Tanh() -> Tanh() ->
FullyConnected(units=classes) -> FullyConnected(units=classes) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture NotIOArray(inputs=10, classes=2){ architecture NotIOArray(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in[1] -> in1[1] ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Softmax() -> Softmax() ->
out[0] out1[0]
} }
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architecture UnfinishedArchitecture(inputs=10, classes=2){ architecture UnfinishedArchitecture(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
( (
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Softmax() -> Softmax() ->
out out1
| |
) )
......
architecture UnknownIO(){ architecture UnknownIO(){
in -> in1 ->
FullyConnected(units=64) -> FullyConnected(units=64) ->
Tanh() -> Tanh() ->
FullyConnected(units=10) -> FullyConnected(units=10) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture UnknownMethod(inputs=10, classes=2){ architecture UnknownMethod(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
FllyConnected(units=64, no_bias=true) -> FllyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture UnknownVariableName(inputs=10){ architecture UnknownVariableName(inputs=10){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{2} out def output Q(0:1)^{2} out1
in -> in1 ->
FullyConnected(units=64) -> FullyConnected(units=64) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes) -> FullyConnected(units=classes) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture WrongArgument(inputs=10, classes=2){ architecture WrongArgument(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
FullyConnected(units=64, bias=true) -> FullyConnected(units=64, bias=true) ->
Tanh(asd=1) -> Tanh(asd=1) ->
FullyConnected(unit=classes) -> FullyConnected(unit=classes) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture WrongIOType(inputs=10, classes=2){ architecture WrongIOType(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Relu() -> Relu() ->
out out1
} }
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architecture WrongRangeOperator(inputs=10, classes=2){ architecture WrongRangeOperator(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
FullyConnected(units=[64->..|65]) -> FullyConnected(units=[64->..|65]) ->
Tanh() -> Tanh() ->
FullyConnected(units=[classes |..-> classes + 1] ) -> FullyConnected(units=[classes |..-> classes + 1] ) ->
Softmax() -> Softmax() ->
out out1
} }
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architecture SimpleNetworkLinear(inputs=10, classes=2){ architecture SimpleNetworkLinear(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(-oo:oo)^{classes} out def output Q(-oo:oo)^{classes} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
out out1
} }
\ No newline at end of file
architecture SimpleNetworkRelu(inputs=10, classes=2){ architecture SimpleNetworkRelu(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:oo)^{classes} out def output Q(0:oo)^{classes} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Relu() -> Relu() ->
out out1
} }
\ No newline at end of file
architecture SimpleNetworkSigmoid(inputs=10, classes=2){ architecture SimpleNetworkSigmoid(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Sigmoid() -> Sigmoid() ->
out out1
} }
\ No newline at end of file
architecture SimpleNetworkSoftmax(inputs=10, classes=2){ architecture SimpleNetworkSoftmax(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(0:1)^{classes} out def output Q(0:1)^{classes} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Softmax() -> Softmax() ->
out out1
} }
\ No newline at end of file
architecture SimpleNetworkTanh(inputs=10, classes=2){ architecture SimpleNetworkTanh(inputs=10, classes=2){
def input Q(-oo:+oo)^{inputs} in def input Q(-oo:+oo)^{inputs} in1
def output Q(-1:1)^{classes} out def output Q(-1:1)^{classes} out1
in -> in1 ->
FullyConnected(units=64, no_bias=true) -> FullyConnected(units=64, no_bias=true) ->
Tanh() -> Tanh() ->
FullyConnected(units=classes, no_bias=true) -> FullyConnected(units=classes, no_bias=true) ->
Tanh() -> Tanh() ->
out out1
} }
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