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monticore
EmbeddedMontiArc
generators
EMAM2Middleware
Commits
1eaa0622
Commit
1eaa0622
authored
Jan 22, 2019
by
Alexander David Hellwig
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Fix failing flatten tests: Connectors of SpanningSystem had typos
parent
7080883a
Pipeline
#98916
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in 60 minutes and 1 second
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src/test/resources/lab/SpanningSystem.emam
src/test/resources/lab/SpanningSystem.emam
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src/test/resources/lab/SpanningSystem.emam
View file @
1eaa0622
...
...
@@ -8,23 +8,23 @@ component SpanningSystem{
instance
OverallSystem
overallSystem1
;
instance
OverallSystem
overallSystem2
;
connect
input
->
O
verallSystem1
.
input
[
1
];
connect
input
->
O
verallSystem1
.
input
[
2
];
connect
input
->
O
verallSystem1
.
input
[
3
];
connect
input
->
O
verallSystem1
.
input
[
4
];
connect
input
->
o
verallSystem1
.
input
[
1
];
connect
input
->
o
verallSystem1
.
input
[
2
];
connect
input
->
o
verallSystem1
.
input
[
3
];
connect
input
->
o
verallSystem1
.
input
[
4
];
connect
O
verallSystem1
.
output
[
4
]
->
output
;
connect
O
verallSystem1
.
output
[
1
]
->
output
;
connect
O
verallSystem1
.
output
[
2
]
->
output
;
connect
O
verallSystem1
.
output
[
3
]
->
output
;
connect
o
verallSystem1
.
output
[
4
]
->
output
;
connect
o
verallSystem1
.
output
[
1
]
->
output
;
connect
o
verallSystem1
.
output
[
2
]
->
output
;
connect
o
verallSystem1
.
output
[
3
]
->
output
;
connect
input
->
O
verallSystem2
.
input
[
1
];
connect
input
->
O
verallSystem2
.
input
[
2
];
connect
input
->
O
verallSystem2
.
input
[
3
];
connect
input
->
O
verallSystem2
.
input
[
4
];
connect
input
->
o
verallSystem2
.
input
[
1
];
connect
input
->
o
verallSystem2
.
input
[
2
];
connect
input
->
o
verallSystem2
.
input
[
3
];
connect
input
->
o
verallSystem2
.
input
[
4
];
connect
O
verallSystem2
.
output
[
4
]
->
output
;
connect
O
verallSystem2
.
output
[
1
]
->
output
;
connect
O
verallSystem2
.
output
[
2
]
->
output
;
connect
O
verallSystem2
.
output
[
3
]
->
output
;
connect
o
verallSystem2
.
output
[
4
]
->
output
;
connect
o
verallSystem2
.
output
[
1
]
->
output
;
connect
o
verallSystem2
.
output
[
2
]
->
output
;
connect
o
verallSystem2
.
output
[
3
]
->
output
;
}
\ No newline at end of file
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