Commit 0415f84b authored by rbo's avatar rbo

isa is changed

parent b607cf86
...@@ -47,7 +47,7 @@ classdef itaHpTF < itaAudio ...@@ -47,7 +47,7 @@ classdef itaHpTF < itaAudio
if nargin == 1 if nargin == 1
% init % init
if isa('itaHpTF',this) if isa(this,'itaHpTF')
this.init = varargin; this.init = varargin;
end end
end end
......
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