Commits · master · IES Public / CAD4SoC

01 Jul, 2021 1 commit
- simplified path to verilog files in project · 3800a834
  Ferdinand Keil authored Jul 01, 2021
```
this should fix problems with students copying the files to other than the intended directory
```
  3800a834
15 Jun, 2021 1 commit
- Update start.sh · bd5ca3d3
  Korner, Dominic authored Jun 15, 2021
  
  bd5ca3d3
14 Jun, 2021 1 commit
- changed start.sh to new Modelsim version · bdd8306d
  Korner, Dominic authored Jun 14, 2021
  
  bdd8306d
24 Jun, 2016 1 commit
- start.sh now loads project · a99246c1
  Ferdinand Keil authored Jun 24, 2016
```
corrected error in alu8_tb.v
```
  a99246c1
22 Jun, 2016 1 commit
- initial commit · 9bfbde33
  Ferdinand Keil authored Jun 22, 2016
  
  9bfbde33