gtnet_skt_2point_udp.log 1.41 KB
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MESSAGES:

Compiling U:\ACS-Public\35_msv\15_msv-ufa\RSCAD_workspace\fileman\GTNET_UDP_tests\GTSKT_tutorial\GTSKT\Standard_2pt_udp_loopback\gtnet_skt_2point_udp.dft for RTDS rack 7...
Nodes and Wires...

    Compiling subsystem ''
    Electrical nodes found: 0


Running In Pre-Processor Mode (RTDSPCPP Inclusion)




REAL-TIME DIGITAL SIMULATOR POWER SYSTEM COMPILER
(c) Copyright 1994-2008  RTDS Technologies Inc.

Version C10.04
Compilation Time: 11:09:29  May 26 2015


              Data file name: gtnet_skt_2point_udp.dtp
               Inf file name: tmp.gtnet_skt_2point_udp.inf
               Map file name: gtnet_skt_2point_udp.map
            Output file name: gtnet_skt_2point_udp_r#

Configuration file directory: .
     Configuration file name: C:\RSCAD\HDWR\config_file_02.txt

        Title from data file: "Test Circuit"


      Library file directory: C:\RSCAD/RTDS
           Library file name: rt_sim.lib
        Library file version: 62.57

      Library file directory: C:\RSCAD/RTDS
           Library file name: rpc.lib
        Library file version: 24.53

Time-step used = 50.000000 us 


Network Conductance Matrix Overlay Statistics:
        Subsystem   1   contains   0   matrix overlays.


Control Component Statistics:
        Subsystem   1   contains   32   control components.


End of process. Peak memory usage = 327438336 bytes


rtc terminated successfully.