- 21 Aug, 2018 9 commits
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Steffen Vogel authored
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Steffen Vogel authored
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Steffen Vogel authored
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Steffen Vogel authored
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Steffen Vogel authored
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Steffen Vogel authored
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Daniel Krebs authored
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Steffen Vogel authored
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Steffen Vogel authored
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- 20 Jul, 2018 2 commits
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Daniel Krebs authored
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Daniel Krebs authored
This was neccessary in order to make the memory available via GDRcopy when multiple small allocations were made. cudaMalloc() would return multiple memory chunks located in the same GPU page, which GDRcopy pretty much dislikes (`gdrdrv:offset != 0 is not supported`). As a side effect, this will keep the number of BAR-mappings done via GDRcopy low, because they seem to be quite limited.
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- 25 Jun, 2018 3 commits
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Steffen Vogel authored
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Steffen Vogel authored
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Steffen Vogel authored
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- 06 Jun, 2018 1 commit
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Daniel Krebs authored
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- 04 Jun, 2018 18 commits
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
Virtual inheritance is required because (for example) the Rtds2Gpu IP inherits from Hls and IpNode who both inherit from IpCore.
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Daniel Krebs authored
- better tested IP (testbenches) - detect invalid frame sizes - more status reporting
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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Daniel Krebs authored
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- 16 May, 2018 2 commits
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Daniel Krebs authored
This is still very simple. Only really free memory, when all allocation have been deallocated so we only need to keep track of the current number of allocations.
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Daniel Krebs authored
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- 15 May, 2018 5 commits
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Daniel Krebs authored
Using CUDA, memory can be allocated on the GPU and shared to peers on the PCIe bus such as the FPGA. Furthermore, the DMA on the GPU can also be used to read and write to/from other memory on the PCIe bus, such as BRAM on the FPGA.
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Daniel Krebs authored
It is probably too costly to do (and verify) it on every read or write. Furthermore, the user knows better how to make a certain memory available to the DMA.
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Daniel Krebs authored
In this case, VFIO cannot create DMA mappings.
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Daniel Krebs authored
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Daniel Krebs authored
This is used for translations that don't use VFIO which used to bridge the PCIe address space by creating direct mappings from process VA to the FPGA. When we want to communicate directly via PCIe without the involvment of the CPU/VFIO, we need the proper translations that are configured in the FPGA hardware.
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