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Commits (5)
Subproject commit 9747c6ead6dedff943dbf22ce74e40e9b2622514
Subproject commit e2ab88e67c79be5d4cae71164be3eabb232ddc04
This diff is collapsed.
This diff is collapsed.
......@@ -119,7 +119,7 @@ protected:
SpdLogger logger;
};
using CardList = std::list<std::unique_ptr<PCIeCard>>;
using CardList = std::list<std::shared_ptr<PCIeCard>>;
class PCIeCardFactory : public Plugin {
public:
......
......@@ -88,6 +88,8 @@ public:
bool isMemoryBlockAccesible(const MemoryBlock& mem, const std::string& interface);
virtual void dump();
private:
static constexpr char registerMemory[] = "Reg";
......
......@@ -89,7 +89,7 @@ Dma::init()
/* Map buffer descriptors */
if (hasScatterGather()) {
logger->warn("Scatter Gather not yet implemented");
return false;
// return false;
// ret = dma_alloc(c, &dma->bd, FPGA_DMA_BD_SIZE, 0);
// if (ret)
......@@ -114,6 +114,8 @@ Dma::init()
bool
Dma::reset()
{
logger->info("DMA resetted");
XAxiDma_Reset(&xDma);
// value taken from libxil implementation
......@@ -396,6 +398,16 @@ Dma::isMemoryBlockAccesible(const MemoryBlock& mem, const std::string& interface
return true;
}
void
Dma::dump()
{
IpCore::dump();
logger->info("S2MM_DMACR: {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_CR_OFFSET));
logger->info("S2MM_DMASR: {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_SR_OFFSET));
logger->info("S2MM_LENGTH: {:x}", XAxiDma_ReadReg(xDma.RegBase, XAXIDMA_RX_OFFSET + XAXIDMA_BUFFLEN_OFFSET));
}
} // namespace ip
} // namespace fpga
......
......@@ -39,7 +39,6 @@
#include <villas/fpga/vlnv.hpp>
#include <villas/fpga/ips/dma.hpp>
#include <villas/fpga/ips/rtds.hpp>
#include <villas/fpga/ips/fifo.hpp>
using namespace villas;
......@@ -63,7 +62,7 @@ void setupColorHandling()
std::atexit([](){std::cout << rang::style::reset;});
}
fpga::PCIeCard&
std::shared_ptr<fpga::PCIeCard>
setupFpgaCard(const std::string& configFile, const std::string& fpgaName)
{
if(pci_init(&pci) != 0) {
......@@ -101,30 +100,24 @@ setupFpgaCard(const std::string& configFile, const std::string& fpgaName)
exit(1);
}
villas::fpga::PCIeCardFactory* fpgaCardPlugin =
dynamic_cast<villas::fpga::PCIeCardFactory*>(plugin);
// create all FPGA card instances using the corresponding plugin
auto cards = fpgaCardPlugin->make(fpgas, &pci, vfioContainer);
villas::fpga::PCIeCard* card = nullptr;
for(auto& fpgaCard : cards) {
if(fpgaCard->name == fpgaName) {
card = fpgaCard.get();
break;
return fpgaCard;
}
}
if(card == nullptr) {
logger->error("FPGA card {} not found in config or not working", fpgaName);
exit(1);
}
logger->error("FPGA card {} not found in config or not working", fpgaName);
// deallocate JSON config
// json_decref(json);
return *card;
return std::shared_ptr<villas::fpga::PCIeCard>();
}
int main(int argc, char* argv[])
......@@ -150,16 +143,16 @@ int main(int argc, char* argv[])
spdlog::set_level(spdlog::level::debug);
setupColorHandling();
fpga::PCIeCard& card = setupFpgaCard(configFile, fpgaName);
auto rtds = reinterpret_cast<fpga::ip::Rtds*>
(card.lookupIp(fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")));
auto card = setupFpgaCard(configFile, fpgaName);
auto dma = reinterpret_cast<fpga::ip::Dma*>
(card.lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:")));
auto rtds = dynamic_cast<fpga::ip::Rtds*>
(card->lookupIp(fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")));
auto fifo = reinterpret_cast<fpga::ip::Fifo*>
(card.lookupIp(fpga::Vlnv("xilinx.com:ip:axi_fifo_mm_s:")));
//auto dma = dynamic_cast<fpga::ip::Dma*>
// (card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:")));
auto dma = dynamic_cast<fpga::ip::Dma*>
(card->lookupIp("hier_0_axi_dma_axi_dma_1"));
if(rtds == nullptr) {
logger->error("No RTDS interface found on FPGA");
......@@ -171,11 +164,6 @@ int main(int argc, char* argv[])
return 1;
}
if(fifo == nullptr) {
logger->error("No Fifo found on FPGA ");
return 1;
}
rtds->dump();
rtds->connect(rtds->getMasterPort(rtds->masterPort),
......@@ -187,6 +175,11 @@ int main(int argc, char* argv[])
auto &alloc = villas::HostRam::getAllocator();
auto mem = alloc.allocate<int32_t>(0x100 / sizeof(int32_t));
auto block = mem.getMemoryBlock();
dma->makeAccesibleFromVA(block);
auto &mm = MemoryManager::get();
mm.getMemoryGraph().dump("graph.dot");
while(true) {
dma->read(block, block.getSize());
......@@ -211,7 +204,9 @@ int main(int argc, char* argv[])
mem[memIdx++] = number;
}
dma->write(block, memIdx * sizeof(int32_t));
bool state = dma->write(block, memIdx * sizeof(int32_t));
if (!state)
logger->error("Failed to write to device");
}
return 0;
......
......@@ -27,7 +27,6 @@ set(SOURCES
dma.cpp
fifo.cpp
rtds.cpp
rtds2gpu.cpp
timer.cpp
)
......@@ -36,7 +35,7 @@ add_executable(unit-tests ${SOURCES})
if(CMAKE_CUDA_COMPILER)
enable_language(CUDA)
target_sources(unit-tests PRIVATE
gpu.cpp gpu_kernels.cu)
gpu.cpp rtds2gpu.cpp gpu_kernels.cu)
endif()
find_package(Criterion REQUIRED)
......