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ACS
Public
Power System Simulation and Optimization
DPsim
DPsim
Commits
f7d82e7b
Commit
f7d82e7b
authored
Sep 18, 2018
by
Steffen Vogel
🎅🏼
Browse files
python: fix tests
parent
4d91bde2
Changes
7
Hide whitespace changes
Inline
Side-by-side
Examples/Python/test_ShmemDistributedDirect.py
View file @
f7d82e7b
...
...
@@ -6,45 +6,45 @@ class Left(threading.Thread):
def
run
(
self
):
# Nodes
gnd
=
dpsim
.
dp
.
Node
.
GND
()
n1
=
dpsim
.
dp
.
Node
(
"
n1
"
)
n2
=
dpsim
.
dp
.
Node
(
"
n2
"
)
n1
=
dpsim
.
dp
.
Node
(
'
n1
'
)
n2
=
dpsim
.
dp
.
Node
(
'
n2
'
)
vs
=
dpsim
.
dp
.
ph1
.
VoltageSourceNorton
(
"
v_s
"
,
[
n1
,
gnd
],
10000
+
0j
,
1
)
evs
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
"
v_ext
"
,
[
n2
,
gnd
],
0
+
0j
)
l1
=
dpsim
.
dp
.
ph1
.
Inductor
(
"
l_1
"
,
[
n1
,
n2
],
1e-3
)
vs
=
dpsim
.
dp
.
ph1
.
VoltageSourceNorton
(
'
v_s
'
,
[
n1
,
gnd
],
10000
+
0j
,
1
)
evs
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
'
v_ext
'
,
[
n2
,
gnd
],
0
+
0j
)
l1
=
dpsim
.
dp
.
ph1
.
Inductor
(
'
l_1
'
,
[
n1
,
n2
],
1e-3
)
intf
=
dpsim
.
open_interface
(
"
/dpsim12
"
,
"
/dpsim21
"
,
samplelen
=
2
)
intf
.
import_attribute
(
evs
,
"v
_ref
"
,
1
,
0
,
1
)
intf
.
export_attribute
(
evs
,
"
i_comp
"
,
1
,
0
,
1
)
intf
=
dpsim
.
open_interface
(
'
/dpsim12
'
,
'
/dpsim21
'
,
samplelen
=
2
)
intf
.
import_attribute
(
evs
,
'V
_ref
'
,
1
,
0
,
1
)
intf
.
export_attribute
(
evs
,
'
i_comp
'
,
1
,
0
,
1
)
sys
=
dpsim
.
SystemTopology
(
50
,
[
gnd
,
n1
,
n2
],
[
evs
,
vs
,
l1
])
sim
=
dpsim
.
Simulation
(
"
shmem1
"
,
sys
,
duration
=
1
)
sim
=
dpsim
.
Simulation
(
'
shmem1
'
,
sys
,
duration
=
1
)
sim
.
add_interface
(
intf
)
print
(
"
Starting simulation on left side
"
)
print
(
'
Starting simulation on left side
'
)
sim
.
run
()
class
Right
(
threading
.
Thread
):
def
run
(
self
):
# Nodes
gnd
=
dpsim
.
dp
.
Node
.
GND
()
n3
=
dpsim
.
dp
.
Node
(
"
n3
"
)
n3
=
dpsim
.
dp
.
Node
(
'
n3
'
)
# Components
ecs
=
dpsim
.
dp
.
ph1
.
CurrentSource
(
"
i_ext
"
,
[
n3
,
gnd
],
0
+
0j
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
"
r_1
"
,
[
n3
,
gnd
],
1
)
ecs
=
dpsim
.
dp
.
ph1
.
CurrentSource
(
'
i_ext
'
,
[
n3
,
gnd
],
0
+
0j
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
'
r_1
'
,
[
n3
,
gnd
],
1
)
intf
=
dpsim
.
open_interface
(
"
/dpsim21
"
,
"
/dpsim12
"
,
samplelen
=
2
)
intf
.
import_attribute
(
ecs
,
"i
_ref
"
,
1
,
0
,
1
)
intf
.
export_attribute
(
r1
,
"
v_comp
"
,
1
,
0
,
1
)
intf
=
dpsim
.
open_interface
(
'
/dpsim21
'
,
'
/dpsim12
'
,
samplelen
=
2
)
intf
.
import_attribute
(
ecs
,
'I
_ref
'
,
1
,
0
,
1
)
intf
.
export_attribute
(
r1
,
'
v_comp
'
,
1
,
0
,
1
)
sys
=
dpsim
.
SystemTopology
(
50
,
[
gnd
,
n3
],
[
ecs
,
r1
])
sim
=
dpsim
.
Simulation
(
"
shmem2
"
,
sys
,
duration
=
1
)
sim
=
dpsim
.
Simulation
(
'
shmem2
'
,
sys
,
duration
=
1
)
sim
.
add_interface
(
intf
)
print
(
"
Starting simulation on right side
"
)
print
(
'
Starting simulation on right side
'
)
sim
.
run
()
def
test_ShmemDistributedDirect
():
...
...
Examples/Python/test_async.py
View file @
f7d82e7b
...
...
@@ -9,7 +9,7 @@ from dpsim.Event import Event
def
my_callback
(
event
,
sim
,
myvar
):
assert
myvar
==
1337
print
(
"
Received Event: %s
"
%
event
)
print
(
'
Received Event: %s
'
%
event
)
if
event
in
[
Event
.
done
,
Event
.
stopped
,
Event
.
stopped
,
Event
.
failed
,
Event
.
overrun
]:
el
=
asyncio
.
get_event_loop
()
...
...
@@ -20,11 +20,11 @@ def test_async():
# Nodes
gnd
=
dpsim
.
dp
.
Node
.
GND
()
n1
=
dpsim
.
dp
.
Node
(
"
n1
"
)
n1
=
dpsim
.
dp
.
Node
(
'
n1
'
)
# Components
v1
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
"
v_1
"
,
[
gnd
,
n1
],
v
_ref
=
10
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
"
r_1
"
,
[
n1
,
gnd
],
resistance
=
1
)
v1
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
'
v_1
'
,
[
gnd
,
n1
],
V
_ref
=
10
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
'
r_1
'
,
[
n1
,
gnd
],
R
=
1
)
system
=
dpsim
.
SystemTopology
(
50
,
[
gnd
,
n1
],
[
v1
,
r1
])
...
...
@@ -46,5 +46,5 @@ def test_async():
el
.
run_forever
()
if
__name__
==
"
__main__
"
:
if
__name__
==
'
__main__
'
:
test_async
()
Examples/Python/test_attribute.py
View file @
f7d82e7b
...
...
@@ -3,23 +3,23 @@ import pytest
def
test_read
():
gnd
=
dpsim
.
dp
.
Node
.
GND
()
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
capacitance
=
1.234
);
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
C
=
1.234
);
assert
c
.
capacitance
==
1.234
assert
c
.
C
==
1.234
assert
c
.
name
==
'c1'
def
test_write
():
gnd
=
dpsim
.
dp
.
Node
.
GND
()
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
capacitance
=
1.234
);
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
C
=
1.234
);
c
.
capacitance
=
5
c
.
C
=
5
assert
c
.
capacitance
==
5
assert
c
.
C
==
5
def
test_invalid
():
with
pytest
.
raises
(
AttributeError
)
as
e_info
:
gnd
=
dpsim
.
dp
.
Node
.
GND
()
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
capacitance
=
1.234
);
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
C
=
1.234
);
# dp.Capacitor does not have an attribute named 'doesnotexist'
# Accessing it should throw a AttributeError exception!
...
...
@@ -28,7 +28,7 @@ def test_invalid():
def
test_access
():
with
pytest
.
raises
(
AttributeError
)
as
e_info
:
gnd
=
dpsim
.
dp
.
Node
.
GND
()
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
capacitance
=
1.234
);
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
C
=
1.234
);
# Current is a read-only property.
# This should throw a AttributeError exception!
...
...
@@ -37,8 +37,8 @@ def test_access():
def
test_type
():
with
pytest
.
raises
(
TypeError
)
as
e_info
:
gnd
=
dpsim
.
dp
.
Node
.
GND
()
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
capacitance
=
1.234
);
c
=
dpsim
.
dp
.
ph1
.
Capacitor
(
'c1'
,
[
gnd
,
gnd
],
C
=
1.234
);
# Capacitance is a real valued property.
# Assigning a complex number should throw a TypeError exception!
c
.
capacitance
=
1j
c
.
C
=
1j
Examples/Python/test_circuit.py
View file @
f7d82e7b
...
...
@@ -6,15 +6,15 @@ PATH = os.path.dirname(__file__)
def
test_circuit
():
# Nodes
gnd
=
dpsim
.
dp
.
Node
.
GND
()
n1
=
dpsim
.
dp
.
Node
(
"
n1
"
)
n2
=
dpsim
.
dp
.
Node
(
"
n2
"
)
n3
=
dpsim
.
dp
.
Node
(
"
n3
"
)
n1
=
dpsim
.
dp
.
Node
(
'
n1
'
)
n2
=
dpsim
.
dp
.
Node
(
'
n2
'
)
n3
=
dpsim
.
dp
.
Node
(
'
n3
'
)
# Components
v1
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
"
v_1
"
,
[
gnd
,
n1
],
v
_ref
=
10
)
lL
=
dpsim
.
dp
.
ph1
.
Inductor
(
"
l_L
"
,
[
n2
,
n3
],
inductance
=
0.001
)
rL
=
dpsim
.
dp
.
ph1
.
Resistor
(
"
r_L
"
,
[
n1
,
n2
],
resistance
=
0.1
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
"
r_1
"
,
[
n3
,
gnd
],
resistance
=
20
)
v1
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
'
v_1
'
,
[
gnd
,
n1
],
V
_ref
=
10
)
lL
=
dpsim
.
dp
.
ph1
.
Inductor
(
'
l_L
'
,
[
n2
,
n3
],
L
=
0.001
)
rL
=
dpsim
.
dp
.
ph1
.
Resistor
(
'
r_L
'
,
[
n1
,
n2
],
R
=
0.1
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
'
r_1
'
,
[
n3
,
gnd
],
R
=
20
)
system
=
dpsim
.
SystemTopology
(
50
,
[
gnd
,
n1
,
n2
,
n3
],
[
v1
,
lL
,
rL
,
r1
])
...
...
@@ -28,9 +28,9 @@ def test_circuit():
#err += ts.TimeSeries.rmse(expected[0], results[0].dynphasor_shift_to_emt('n1_emt', 50))
#err += ts.TimeSeries.rmse(expected[1], results[1].dynphasor_shift_to_emt('n2_emt', 50))
print
(
"
Total RMSE: %g
"
%
(
err
))
print
(
'
Total RMSE: %g
'
%
(
err
))
assert
err
<
1e-4
if
__name__
==
"
__main__
"
:
if
__name__
==
'
__main__
'
:
test_circuit
()
Examples/Python/test_realtime.py
View file @
f7d82e7b
...
...
@@ -6,11 +6,11 @@ from dpsim.Event import Event
def
test_realtime
():
# Nodes
gnd
=
dpsim
.
dp
.
Node
.
GND
()
n1
=
dpsim
.
dp
.
Node
(
"
n1
"
)
n1
=
dpsim
.
dp
.
Node
(
'
n1
'
)
# Components
v1
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
"
v_1
"
,
[
gnd
,
n1
],
v
_ref
=
10
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
"
r_1
"
,
[
n1
,
gnd
],
resistance
=
1
)
v1
=
dpsim
.
dp
.
ph1
.
VoltageSource
(
'
v_1
'
,
[
gnd
,
n1
],
V
_ref
=
10
)
r1
=
dpsim
.
dp
.
ph1
.
Resistor
(
'
r_1
'
,
[
n1
,
gnd
],
R
=
1
)
system
=
dpsim
.
SystemTopology
(
50
,
[
gnd
,
n1
],
[
v1
,
r1
])
...
...
@@ -23,5 +23,5 @@ def test_realtime():
sim
.
run
(
pbar
=
True
)
if
__name__
==
"
__main__
"
:
if
__name__
==
'
__main__
'
:
test_realtime
()
Examples/Python/test_simulation.py
View file @
f7d82e7b
...
...
@@ -6,11 +6,11 @@ from dpsim.Event import Event
def
test_simulation
():
logging
.
getLogger
().
setLevel
(
logging
.
DEBUG
)
logging
.
info
(
"
hello
\n
"
)
logging
.
info
(
'
hello
\n
'
)
n1
=
dpsim
.
dp
.
Node
(
"
n1
"
)
n1
=
dpsim
.
dp
.
Node
(
'
n1
'
)
gnd
=
dpsim
.
dp
.
Node
.
GND
()
r
=
dpsim
.
dp
.
ph1
.
Resistor
(
"
r1
"
,
[
gnd
,
n1
])
r
=
dpsim
.
dp
.
ph1
.
Resistor
(
'
r1
'
,
[
gnd
,
n1
])
sys
=
dpsim
.
SystemTopology
(
50
,
[
n1
],
[
r
])
...
...
@@ -48,5 +48,5 @@ def test_simulation():
assert
sim
.
wait_until
()
==
Event
.
stopping
assert
sim
.
wait_until
()
==
Event
.
stopped
if
__name__
==
"
__main__
"
:
if
__name__
==
'
__main__
'
:
test_simulation
()
Examples/Python/test_singlestepping.py
View file @
f7d82e7b
...
...
@@ -6,12 +6,12 @@ from dpsim.Event import Event
def
test_simulation
():
logging
.
getLogger
().
setLevel
(
logging
.
DEBUG
)
logging
.
info
(
"
hello
\n
"
)
logging
.
info
(
'
hello
\n
'
)
n1
=
dpsim
.
dp
.
Node
(
"
n1
"
)
n1
=
dpsim
.
dp
.
Node
(
'
n1
'
)
gnd
=
dpsim
.
dp
.
Node
.
GND
()
r
=
dpsim
.
dp
.
ph1
.
Resistor
(
"
r1
"
,
[
gnd
,
n1
])
r
=
dpsim
.
dp
.
ph1
.
Resistor
(
'
r1
'
,
[
gnd
,
n1
])
sys
=
dpsim
.
SystemTopology
(
50
,
[
n1
],
[
r
])
...
...
@@ -34,5 +34,5 @@ def test_simulation():
assert
sim
.
wait_until
()
==
Event
.
stopped
if
__name__
==
"
__main__
"
:
if
__name__
==
'
__main__
'
:
test_simulation
()
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