update basic examples and cps

libcps @ d8c932c6

-Subproject commit e4aaf280f5f8569c39ec04bceb5cc974d246a80b
+Subproject commit d8c932c68a2808c5d9f565161edcfb43e9c97100

Examples/Cxx/Circuits/DP_IdealVS_CS_R4_1b.cpp → Examples/Cxx/Circuits/DP_VS_RC1.cpp

@@ -19,7 +19,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  *********************************************************************************/
 
-#include "DPsim.h"
+#include <DPsim.h>
 
 using namespace DPsim;
 using namespace CPS::DP;
@@ -29,37 +29,38 @@ int main(int argc, char* argv[]) {
 	// Nodes
 	auto n1 = Node::make("n1");
 	auto n2 = Node::make("n2");
-	auto n3 = Node::make("n3");
 
 	// Components
-	auto vs = VoltageSource::make("vs");
-	vs->setParameters(10);
-	vs->connect(Node::List{ Node::GND, n1 });
-	auto r1 = Resistor::make("r_1");
+	auto vs = VoltageSource::make("vs", Logger::Level::DEBUG);
+	auto r1 = Resistor::make("r_1", Logger::Level::DEBUG);
+	auto c1 = Capacitor::make("c_1", Logger::Level::DEBUG);
+
+	// Topology
+	vs->connect({ Node::GND, n1 });
+	r1->connect({ n1, n2 });
+	c1->connect({ n2, Node::GND });
+
+	vs->setParameters(Complex(10, 0));
 	r1->setParameters(1);
-	r1->connect(Node::List{ n1, n2 });
-	auto r2 = Resistor::make("r_2", Logger::Level::DEBUG);
-	r2->setParameters(1);
-	r2->connect(Node::List{ n2, Node::GND });
-	auto r3 = Resistor::make("r_3");
-	r3->setParameters(10);
-	r3->connect(Node::List{ n2, n3 });
-	auto r4 = Resistor::make("r_4");
-	r4->setParameters(5);
-	r4->connect(Node::List{ n3, Node::GND });
-	auto cs = CurrentSource::make("cs");
-	cs->setParameters(1);
-	cs->connect(Node::List{ Node::GND, n3 });
+	c1->setParameters(0.001);
 
 	// Define system topology
-	auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, SystemComponentList{vs, r1, r2, r3, r4, cs});
+	auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{vs, r1, c1});
 
 	// Define simulation scenario
 	Real timeStep = 0.0001;
 	Real finalTime = 0.1;
-	String simName = "DP_IdealVS_CS_R4_1b";
+	String simName = "DP_IdealVS_RC1";
+
+	// Logging
+	auto logger = DataLogger::make(simName);
+	logger->addAttribute("v1", n1->attribute("voltage"));
+	logger->addAttribute("v2", n2->attribute("voltage"));
+	logger->addAttribute("i1", r1->attribute("i_comp"));
 
 	Simulation sim(simName, sys, timeStep, finalTime);
+	sim.addLogger(logger);
+
 	sim.run();
 
 	return 0;

Examples/Cxx/Circuits/EMT_IdealVS_R_1.cpp → Examples/Cxx/Circuits/EMT_VS_R1.cpp

@@ -56,7 +56,7 @@ int main(int argc, char* argv[]) {
 	// Define simulation scenario
 	Real timeStep = 0.00005;
 	Real finalTime = 0.2;
-	String simName = "EMT_IdealVS_R1";
+	String simName = "EMT_VS_R1";
 
 	Simulation sim(simName, system, timeStep, finalTime, Domain::EMT);
 	sim.run();

Examples/Cxx/Circuits/EMT_IdealVS_R2L3.cpp → Examples/Cxx/Circuits/EMT_VS_R2L3.cpp

@@ -33,22 +33,22 @@ int main(int argc, char* argv[]) {
 	auto n4 = Node::make("n4");
 
 	// Components
-	auto vs = VoltageSource::make("vs");
+	auto vs = VoltageSource::make("vs", Logger::Level::DEBUG);
 	vs->setParameters(10, 50);
 	vs->connect(Node::List{ Node::GND, n1 });
-	auto r1 = Resistor::make("r_1");
+	auto r1 = Resistor::make("r_1", Logger::Level::DEBUG);
 	r1->setParameters(1);
 	r1->connect(Node::List{ n1, n2 });
-	auto l1 = Inductor::make("l_1");
+	auto l1 = Inductor::make("l_1", Logger::Level::DEBUG);
 	l1->setParameters(0.02);
 	l1->connect(Node::List{ n2, n3 });
-	auto l2 = Inductor::make("l_2");
+	auto l2 = Inductor::make("l_2", Logger::Level::DEBUG);
 	l2->setParameters(0.1);
 	l2->connect(Node::List{ n3, Node::GND });
-	auto l3 = Inductor::make("l_3");
+	auto l3 = Inductor::make("l_3", Logger::Level::DEBUG);
 	l3->setParameters(0.05);
 	l3->connect(Node::List{ n3, n4 });
-	auto r2 = Resistor::make("r_2");
+	auto r2 = Resistor::make("r_2", Logger::Level::DEBUG);
 	r2->setParameters(2);
 	r2->connect(Node::List{ n4, Node::GND });
 
@@ -56,11 +56,22 @@ int main(int argc, char* argv[]) {
 	auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3, n4}, SystemComponentList{vs, r1, l1, l2, l3, r2});
 
 	// Define simulation scenario
-	Real timeStep = 0.0001;
+	Real timeStep = 0.00001;
 	Real finalTime = 0.1;
 	String simName = "EMT_IdealVS_R2L3";
 
+	// Logging
+	auto logger = DataLogger::make(simName);
+	logger->addAttribute("v1", n1->attribute("voltage"));
+	logger->addAttribute("v2", n2->attribute("voltage"));
+	logger->addAttribute("v3", n3->attribute("voltage"));
+	logger->addAttribute("v4", n4->attribute("voltage"));
+	logger->addAttribute("i30", l2->attribute("i_intf"));
+	logger->addAttribute("i34", l3->attribute("i_intf"));
+
 	Simulation sim(simName, sys, timeStep, finalTime, Domain::EMT);
+	sim.addLogger(logger);
+
 	sim.run();
 
 	return 0;

Examples/Cxx/Circuits/DP_IdealVS_RC1.cpp → Examples/Cxx/Circuits/EMT_VS_RC1.cpp

@@ -22,8 +22,8 @@
 #include <DPsim.h>
 
 using namespace DPsim;
-using namespace CPS::DP;
-using namespace CPS::DP::Ph1;
+using namespace CPS::EMT;
+using namespace CPS::EMT::Ph1;
 
 int main(int argc, char* argv[]) {
 	// Nodes
@@ -48,11 +48,19 @@ int main(int argc, char* argv[]) {
 	auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{vs, r1, c1});
 
 	// Define simulation scenario
-	Real timeStep = 0.001;
+	Real timeStep = 0.0001;
 	Real finalTime = 0.1;
-	String simName = "DP_IdealVS_RL1";
+	String simName = "DP_IdealVS_RC1";
+
+	// Logging
+	auto logger = DataLogger::make(simName);
+	logger->addAttribute("v1", n1->attribute("voltage"));
+	logger->addAttribute("v2", n2->attribute("voltage"));
+	logger->addAttribute("i1", r1->attribute("i_comp"));
+
+	Simulation sim(simName, sys, timeStep, finalTime, Domain::EMT);
+	sim.addLogger(logger);
 
-	Simulation sim(simName, sys, timeStep, finalTime);
 	sim.run();
 
 	return 0;