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Commit d78a378b authored by Markus Mirz's avatar Markus Mirz
Browse files

fix minor log issues


Signed-off-by: Markus Mirz's avatarMarkus Mirz <mmirz@eonerc.rwth-aachen.de>
parent 1adf0c53
......@@ -58,9 +58,9 @@ namespace DPsim {
Solver(String name, CPS::Logger::Level logLevel) :
mName(name),
mLogLevel(logLevel),
// Solver global logging
mSLog(CPS::Logger::get(name + "_Solver", logLevel)) { }
mLogLevel(logLevel) {
mSLog = CPS::Logger::get(name + "_Solver", logLevel, CPS::Logger::Level::warn);
}
virtual ~Solver() { }
......
......@@ -14,12 +14,7 @@ using namespace DPsim;
using namespace CPS;
PFSolver::PFSolver(CPS::String name, CPS::SystemTopology system, CPS::Real timeStep, CPS::Logger::Level logLevel) :
Solver(name, logLevel)
{
/* We also want to set the CLI loglevel according to the logLevel
* std::max(Logger::Level::info, logLevel). But because of excessive
* logging to Level::info that is currently infeasible. */
mSLog = Logger::get(name + "_PF", logLevel, Logger::Level::warn);
Solver(name + "_PF", logLevel) {
mSystem = system;
mTimeStep = timeStep;
}
......
......@@ -430,6 +430,7 @@ void Simulation::stop() {
lg->close();
mLog->info("Simulation finished.");
mLog->flush();
}
Real Simulation::next() {
......
......@@ -31,8 +31,17 @@ PYBIND11_MODULE(dpsimpy, m) {
:toctree: _generate
)pbdoc";
py::enum_<CPS::Logger::Level>(m, "LogLevel")
.value("trace", CPS::Logger::Level::trace)
.value("debug", CPS::Logger::Level::debug)
.value("info", CPS::Logger::Level::info)
.value("warn", CPS::Logger::Level::warn)
.value("err", CPS::Logger::Level::err)
.value("critical", CPS::Logger::Level::critical)
.value("off", CPS::Logger::Level::off);
py::class_<DPsim::Simulation>(m, "Simulation")
.def(py::init<std::string>())
.def(py::init<std::string, CPS::Logger::Level>(), py::arg("name"), py::arg("loglevel") = CPS::Logger::Level::off)
.def("name", &DPsim::Simulation::name)
.def("set_time_step", &DPsim::Simulation::setTimeStep)
.def("set_final_time", &DPsim::Simulation::setFinalTime)
......@@ -52,7 +61,7 @@ PYBIND11_MODULE(dpsimpy, m) {
.def("log_attr", &DPsim::Simulation::logIdObjAttr);
py::class_<DPsim::RealTimeSimulation, DPsim::Simulation>(m, "RealTimeSimulation")
.def(py::init<std::string>())
.def(py::init<std::string, CPS::Logger::Level>(), py::arg("name"), py::arg("loglevel") = CPS::Logger::Level::info)
.def("name", &DPsim::RealTimeSimulation::name)
.def("set_time_step", &DPsim::RealTimeSimulation::setTimeStep)
.def("set_final_time", &DPsim::RealTimeSimulation::setFinalTime)
......@@ -114,15 +123,6 @@ PYBIND11_MODULE(dpsimpy, m) {
.value("DAE", DPsim::Solver::Type::DAE)
.value("NRP", DPsim::Solver::Type::NRP);
py::enum_<CPS::Logger::Level>(m, "LogLevel")
.value("trace", CPS::Logger::Level::trace)
.value("debug", CPS::Logger::Level::debug)
.value("info", CPS::Logger::Level::info)
.value("warn", CPS::Logger::Level::warn)
.value("err", CPS::Logger::Level::err)
.value("critical", CPS::Logger::Level::critical)
.value("off", CPS::Logger::Level::off);
py::enum_<CPS::CSVReader::Mode>(m, "CSVReaderMode")
.value("AUTO", CPS::CSVReader::Mode::AUTO)
.value("MANUAL", CPS::CSVReader::Mode::MANUAL);
......@@ -134,7 +134,7 @@ PYBIND11_MODULE(dpsimpy, m) {
.value("MINUTES", CPS::CSVReader::DataFormat::MINUTES);
py::class_<CPS::CIM::Reader>(m, "CIMReader")
.def(py::init<std::string>())
.def(py::init<std::string, CPS::Logger::Level, CPS::Logger::Level>(), py::arg("name"), py::arg("loglevel") = CPS::Logger::Level::info, py::arg("comploglevel") = CPS::Logger::Level::off)
.def("loadCIM", (CPS::SystemTopology (CPS::CIM::Reader::*)(CPS::Real, const std::list<CPS::String> &, CPS::Domain, CPS::PhaseType)) &CPS::CIM::Reader::loadCIM);
py::class_<CPS::CSVReader>(m, "CSVReader")
......
......@@ -167,13 +167,13 @@ void SP::Ph1::PiLine::initializeFromNodesAndTerminals(Real frequency) {
mVirtualNodes[0]->setInitialVoltage(initialSingleVoltage(0) + mIntfCurrent(0, 0) * mSeriesRes);
// Create series sub components
mSubSeriesResistor = std::make_shared<SP::Ph1::Resistor>(mName + "_res", Logger::Level::info);
mSubSeriesResistor = std::make_shared<SP::Ph1::Resistor>(mName + "_res", mLogLevel);
mSubSeriesResistor->setParameters(mSeriesRes);
mSubSeriesResistor->connect({ mTerminals[0]->node(), mVirtualNodes[0] });
mSubSeriesResistor->initialize(mFrequencies);
mSubSeriesResistor->initializeFromNodesAndTerminals(frequency);
mSubSeriesInductor = std::make_shared<SP::Ph1::Inductor>(mName + "_ind", Logger::Level::info);
mSubSeriesInductor = std::make_shared<SP::Ph1::Inductor>(mName + "_ind", mLogLevel);
mSubSeriesInductor->setParameters(mSeriesInd);
mSubSeriesInductor->connect({ mVirtualNodes[0], mTerminals[1]->node() });
mSubSeriesInductor->initialize(mFrequencies);
......@@ -181,13 +181,13 @@ void SP::Ph1::PiLine::initializeFromNodesAndTerminals(Real frequency) {
// Create parallel sub components
if (mParallelCond >= 0) {
mSubParallelResistor0 = std::make_shared<SP::Ph1::Resistor>(mName + "_con0", Logger::Level::info);
mSubParallelResistor0 = std::make_shared<SP::Ph1::Resistor>(mName + "_con0", mLogLevel);
mSubParallelResistor0->setParameters(2. / mParallelCond);
mSubParallelResistor0->connect(SimNode::List{ SimNode::GND, mTerminals[0]->node() });
mSubParallelResistor0->initialize(mFrequencies);
mSubParallelResistor0->initializeFromNodesAndTerminals(frequency);
mSubParallelResistor1 = std::make_shared<SP::Ph1::Resistor>(mName + "_con1", Logger::Level::info);
mSubParallelResistor1 = std::make_shared<SP::Ph1::Resistor>(mName + "_con1", mLogLevel);
mSubParallelResistor1->setParameters(2. / mParallelCond);
mSubParallelResistor1->connect(SimNode::List{ SimNode::GND, mTerminals[1]->node() });
mSubParallelResistor1->initialize(mFrequencies);
......@@ -195,13 +195,13 @@ void SP::Ph1::PiLine::initializeFromNodesAndTerminals(Real frequency) {
}
if (mParallelCap >= 0) {
mSubParallelCapacitor0 = std::make_shared<SP::Ph1::Capacitor>(mName + "_cap0", Logger::Level::info);
mSubParallelCapacitor0 = std::make_shared<SP::Ph1::Capacitor>(mName + "_cap0", mLogLevel);
mSubParallelCapacitor0->setParameters(mParallelCap / 2.);
mSubParallelCapacitor0->connect(SimNode::List{ SimNode::GND, mTerminals[0]->node() });
mSubParallelCapacitor0->initialize(mFrequencies);
mSubParallelCapacitor0->initializeFromNodesAndTerminals(frequency);
mSubParallelCapacitor1 = std::make_shared<SP::Ph1::Capacitor>(mName + "_cap1", Logger::Level::info);
mSubParallelCapacitor1 = std::make_shared<SP::Ph1::Capacitor>(mName + "_cap1", mLogLevel);
mSubParallelCapacitor1->setParameters(mParallelCap / 2.);
mSubParallelCapacitor1->connect(SimNode::List{ SimNode::GND, mTerminals[1]->node() });
mSubParallelCapacitor1->initialize(mFrequencies);
......
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