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Power System Simulation and Optimization
DPsim
DPsim
Commits
d3ac1d1b
Commit
d3ac1d1b
authored
Sep 19, 2018
by
Markus Mirz
Browse files
add logging to VS R2L3 examples
Former-commit-id:
3b28ee14
parent
2c68534c
Changes
1
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Inline
Side-by-side
Examples/Cxx/Circuits/DP_IdealVS_R2L3.cpp
View file @
d3ac1d1b
...
...
@@ -60,7 +60,18 @@ int main(int argc, char* argv[]) {
Real
finalTime
=
0.1
;
String
simName
=
"DP_IdealVS_R2L3"
;
// Logging
auto
logger
=
DataLogger
::
make
(
simName
);
logger
->
addAttribute
(
"v1"
,
n1
->
attribute
(
"voltage"
));
logger
->
addAttribute
(
"v2"
,
n2
->
attribute
(
"voltage"
));
logger
->
addAttribute
(
"v3"
,
n3
->
attribute
(
"voltage"
));
logger
->
addAttribute
(
"v4"
,
n4
->
attribute
(
"voltage"
));
logger
->
addAttribute
(
"i30"
,
l2
->
attribute
(
"i_intf"
));
logger
->
addAttribute
(
"i34"
,
l3
->
attribute
(
"i_intf"
));
Simulation
sim
(
simName
,
sys
,
timeStep
,
finalTime
);
sim
.
addLogger
(
logger
);
sim
.
run
();
return
0
;
...
...
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