Commit cf76f9a1 authored by Jan Dinkelbach's avatar Jan Dinkelbach Committed by Markus Mirz
Browse files

fix resistor in sp1ph and add validation notebook

parent 49387be5
......@@ -20,10 +20,6 @@ set(CIRCUIT_SOURCES
# DP examples with PF initialization
Circuits/DP_Slack_PiLine_PQLoad_with_PF_Init.cpp
Circuits/DP_Slack_PiLine_VSI_with_PF_Init.cpp
# Combined EMT and DP examples
Circuits/EMT_DP_SP_Slack.cpp
Circuits/EMT_DP_VS_Init.cpp
Circuits/EMT_DP_VS_RLC_Circuits.cpp
# Powerflow examples
Circuits/PF_Slack_PiLine_PQLoad.cpp
......@@ -45,7 +41,10 @@ set(CIRCUIT_SOURCES
# SP examples
Circuits/SP_Circuits.cpp
# EMT and DP studies
# Combined EMT/DP/SP examples
Circuits/EMT_DP_SP_Slack.cpp
Circuits/EMT_DP_VS_Init.cpp
Circuits/EMT_DP_SP_VS_RLC.cpp
Circuits/DP_EMT_RL_SourceStep.cpp
)
......
......@@ -33,7 +33,7 @@ void voltageSourceResistorEMT3ph() {
auto vs = EMT::Ph3::VoltageSource::make("vs1");
vs->setParameters(Reader::singlePhaseVariableToThreePhase(CPS::Math::polar(100000, 0)), 50);
auto res = EMT::Ph3::Resistor::make("R1");
auto res = EMT::Ph3::Resistor::make("R1", Logger::Level::debug);
res->setParameters(Reader::singlePhaseParameterToThreePhase(100));
// Topology
......@@ -72,7 +72,7 @@ void voltageSourceResistorDP1ph() {
auto vs = DP::Ph1::VoltageSource::make("vs1");
vs->setParameters(CPS::Math::polar(100000, 0));
auto res = DP::Ph1::Resistor::make("R1");
auto res = DP::Ph1::Resistor::make("R1", Logger::Level::debug);
res->setParameters(100);
// Topology
......@@ -98,6 +98,45 @@ void voltageSourceResistorDP1ph() {
sim.run();
}
void voltageSourceResistorSP1ph() {
Real timeStep = 0.00005;
Real finalTime = 1;
String simName = "SP_VoltageSource_Resistor";
Logger::setLogDir("logs/"+simName);
// Nodes
auto n1 = SimNode<Complex>::make("n1");
// Components
auto vs = SP::Ph1::VoltageSource::make("vs1");
vs->setParameters(CPS::Math::polar(100000, 0));
auto res = SP::Ph1::Resistor::make("R1", Logger::Level::debug);
res->setParameters(100);
// Topology
vs->connect({ SimNode<Complex>::GND, n1 });
res->connect({n1, SimNode<Complex>::GND});
auto sys = SystemTopology(50,
SystemNodeList{n1},
SystemComponentList{vs, res});
// Logging
auto logger = DataLogger::make(simName);
logger->addAttribute("v1", n1->attribute("v"));
logger->addAttribute("iR", res->attribute("i_intf"));
// Simulation
Simulation sim(simName);
sim.setSystem(sys);
sim.setTimeStep(timeStep);
sim.setFinalTime(finalTime);
sim.setDomain(Domain::SP);
sim.addLogger(logger);
sim.run();
}
void voltageSourceInductorEMT3ph() {
Real timeStep = 0.00005;
Real finalTime = 1;
......@@ -112,7 +151,7 @@ void voltageSourceInductorEMT3ph() {
auto vs = EMT::Ph3::VoltageSource::make("vs1", Logger::Level::debug);
vs->setParameters(Reader::singlePhaseVariableToThreePhase(CPS::Math::polar(100000, 0)), 50);
auto res = EMT::Ph3::Resistor::make("R1");
auto res = EMT::Ph3::Resistor::make("R1", Logger::Level::debug);
res->setParameters(Reader::singlePhaseParameterToThreePhase(5));
auto ind = EMT::Ph3::Inductor::make("L1", Logger::Level::debug);
......@@ -158,7 +197,7 @@ void voltageSourceInductorDP1ph() {
auto vs = DP::Ph1::VoltageSource::make("vs1", Logger::Level::debug);
vs->setParameters(CPS::Math::polar(100000, 0));
auto res = DP::Ph1::Resistor::make("R1");
auto res = DP::Ph1::Resistor::make("R1", Logger::Level::debug);
res->setParameters(5);
auto ind = DP::Ph1::Inductor::make("L1", Logger::Level::debug);
......@@ -190,6 +229,52 @@ void voltageSourceInductorDP1ph() {
sim.run();
}
void voltageSourceInductorSP1ph() {
Real timeStep = 0.00005;
Real finalTime = 1;
String simName = "SP_VoltageSource_Inductor";
Logger::setLogDir("logs/"+simName);
// Nodes
auto n1 = SimNode<Complex>::make("n1");
auto n2 = SimNode<Complex>::make("n2");
// Components
auto vs = SP::Ph1::VoltageSource::make("vs1", Logger::Level::debug);
vs->setParameters(CPS::Math::polar(100000, 0));
auto res = SP::Ph1::Resistor::make("R1", Logger::Level::debug);
res->setParameters(5);
auto ind = SP::Ph1::Inductor::make("L1", Logger::Level::debug);
ind->setParameters(0.5);
// Topology
vs->connect({ SimNode<Complex>::GND, n1 });
res->connect({n1, n2});
ind->connect({n2, SimNode<Complex>::GND});
auto sys = SystemTopology(50,
SystemNodeList{n1, n2},
SystemComponentList{vs, res, ind});
// Logging
auto logger = DataLogger::make(simName);
logger->addAttribute("v1", n1->attribute("v"));
logger->addAttribute("v2", n2->attribute("v"));
logger->addAttribute("iR", res->attribute("i_intf"));
logger->addAttribute("iL", ind->attribute("i_intf"));
// Simulation
Simulation sim(simName);
sim.setSystem(sys);
sim.setTimeStep(timeStep);
sim.setFinalTime(finalTime);
sim.setDomain(Domain::SP);
sim.addLogger(logger);
sim.run();
}
void voltageSourceCapacitorEMT3ph() {
Real timeStep = 0.00005;
Real finalTime = 1;
......@@ -204,7 +289,7 @@ void voltageSourceCapacitorEMT3ph() {
auto vs = EMT::Ph3::VoltageSource::make("vs1", Logger::Level::debug);
vs->setParameters(Reader::singlePhaseVariableToThreePhase(CPS::Math::polar(100000, 0)), 50);
auto res = EMT::Ph3::Resistor::make("R1");
auto res = EMT::Ph3::Resistor::make("R1", Logger::Level::debug);
res->setParameters(Reader::singlePhaseParameterToThreePhase(5));
auto cap = EMT::Ph3::Capacitor::make("C1", Logger::Level::debug);
......@@ -250,7 +335,7 @@ void voltageSourceCapacitorDP1ph() {
auto vs = DP::Ph1::VoltageSource::make("vs1", Logger::Level::debug);
vs->setParameters(CPS::Math::polar(100000, 0));
auto res = DP::Ph1::Resistor::make("R1");
auto res = DP::Ph1::Resistor::make("R1", Logger::Level::debug);
res->setParameters(5);
auto cap = DP::Ph1::Capacitor::make("C1", Logger::Level::debug);
......@@ -282,13 +367,62 @@ void voltageSourceCapacitorDP1ph() {
sim.run();
}
void voltageSourceCapacitorSP1ph() {
Real timeStep = 0.00005;
Real finalTime = 1;
String simName = "SP_VoltageSource_Capacitor";
Logger::setLogDir("logs/"+simName);
// Nodes
auto n1 = SimNode<Complex>::make("n1");
auto n2 = SimNode<Complex>::make("n2");
// Components
auto vs = SP::Ph1::VoltageSource::make("vs1", Logger::Level::debug);
vs->setParameters(CPS::Math::polar(100000, 0));
auto res = SP::Ph1::Resistor::make("R1", Logger::Level::debug);
res->setParameters(5);
auto cap = SP::Ph1::Capacitor::make("C1", Logger::Level::debug);
cap->setParameters(10e-3);
// Topology
vs->connect({ SimNode<Complex>::GND, n1 });
res->connect({n1, n2});
cap->connect({n2, SimNode<Complex>::GND});
auto sys = SystemTopology(50,
SystemNodeList{n1, n2},
SystemComponentList{vs, res, cap});
// Logging
auto logger = DataLogger::make(simName);
logger->addAttribute("v1", n1->attribute("v"));
logger->addAttribute("v2", n2->attribute("v"));
logger->addAttribute("iR", res->attribute("i_intf"));
logger->addAttribute("iC", cap->attribute("i_intf"));
// Simulation
Simulation sim(simName);
sim.setSystem(sys);
sim.setTimeStep(timeStep);
sim.setFinalTime(finalTime);
sim.setDomain(Domain::SP);
sim.addLogger(logger);
sim.run();
}
int main(int argc, char* argv[]) {
voltageSourceResistorEMT3ph();
voltageSourceResistorDP1ph();
voltageSourceResistorSP1ph();
voltageSourceInductorEMT3ph();
voltageSourceInductorDP1ph();
voltageSourceInductorSP1ph();
voltageSourceCapacitorEMT3ph();
voltageSourceCapacitorDP1ph();
voltageSourceCapacitorSP1ph();
}
......@@ -3,11 +3,11 @@
``` python
%%bash
TOP=${TOP:-$(git rev-parse --show-toplevel)}
PATH=${TOP}/build/Examples/Cxx
EMT_DP_VS_RLC_Circuits
EMT_DP_SP_VS_RLC
```
%% Cell type:code id: tags:
``` python
......@@ -17,10 +17,12 @@
import matplotlib.pyplot as plt
import numpy as np
import re
#%matplotlib widget
epsilon = 1e-12
```
%% Cell type:markdown id: tags:
## Voltage Source + Resistor
......@@ -28,10 +30,15 @@
%% Cell type:code id: tags:
``` python
model_name = 'VoltageSource_Resistor'
path_SP = 'logs/' + 'SP_' + model_name + '/'
dpsim_result_file_SP = path_SP + 'SP_' + model_name + '.csv'
ts_dpsim_SP = read_timeseries_csv(dpsim_result_file_SP)
ts_dpsim_SP_shifted = ts.frequency_shift_list(ts_dpsim_SP, 50)
path_DP = 'logs/' + 'DP_' + model_name + '/'
dpsim_result_file_DP = path_DP + 'DP_' + model_name + '.csv'
ts_dpsim_DP = read_timeseries_csv(dpsim_result_file_DP)
ts_dpsim_DP_shifted = ts.frequency_shift_list(ts_dpsim_DP, 50)
......@@ -55,11 +62,16 @@
plt.plot(ts_dpsim_EMT[var_name].time, np.sqrt(3/2)*ts_dpsim_EMT[var_name].values, label=var_name)
# DP
var_names = ['v1_shift']
for var_name in var_names:
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name, linestyle=':')
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name+' (DP)', linestyle='-.')
# SP
var_names = ['v1_shift']
for var_name in var_names:
plt.plot(ts_dpsim_SP_shifted[var_name].time, ts_dpsim_SP_shifted[var_name].values, label=var_name+' (SP)', linestyle=':')
plt.legend()
plt.show()
```
......@@ -78,18 +90,63 @@
plt.plot(ts_dpsim_EMT[var_name].time, np.sqrt(3/2)*ts_dpsim_EMT[var_name].values, label=var_name)
# DP
var_names = ['iR_shift']
for var_name in var_names:
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name, linestyle=':')
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name+' (DP)', linestyle='-.')
# SP
var_names = ['iR_shift']
for var_name in var_names:
plt.plot(ts_dpsim_SP_shifted[var_name].time, ts_dpsim_SP_shifted[var_name].values, label=var_name+' (SP)', linestyle=':')
plt.legend()
plt.show()
```
%% Cell type:markdown id: tags:
### Comparison SP vs. DP
%% Cell type:code id: tags:
``` python
plt.figure()
for name in [('v1_shift', 'v1_shift')]:
plt.plot(ts_dpsim_SP_shifted[name[0]].time, ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values, label=name[0]+' (SP) vs. '+name[1]+' (DP)')
plt.legend()
```
%% Cell type:code id: tags:
``` python
plt.figure()
for name in [('iR_shift', 'iR_shift')]:
plt.plot(ts_dpsim_SP_shifted[name[0]].time, ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values, label=name[0]+' (SP) vs. '+name[1]+' (DP)')
plt.legend()
```
%% Cell type:markdown id: tags:
### Assertion SP vs. DP
%% Cell type:code id: tags:
``` python
compare_errors_abs = []
compare_errors_rel = []
for name in [('v1_shift', 'v1_shift'), ('iR_shift', 'iR_shift')]:
compare_errors_abs.append(np.absolute(ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values).max())
compare_errors_rel.append(np.absolute(ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values).max()/ts_dpsim_DP_shifted[name[1]].values.max())
print(name[0]+' vs. '+name[1] + ' (abs): ' + str(compare_errors_abs[-1]))
print(name[0]+' vs. '+name[1] + ' (rel): ' + str(compare_errors_rel[-1]))
print('Max rel error: '+ '{:.2}'.format(np.max(compare_errors_rel)*100) +'%')
assert np.max(compare_errors_rel) < epsilon
```
%% Cell type:markdown id: tags:
### Comparison DP vs. EMT
%% Cell type:code id: tags:
``` python
......@@ -133,10 +190,15 @@
%% Cell type:code id: tags:
``` python
model_name = 'VoltageSource_Inductor'
path_SP = 'logs/' + 'SP_' + model_name + '/'
dpsim_result_file_SP = path_SP + 'SP_' + model_name + '.csv'
ts_dpsim_SP = read_timeseries_csv(dpsim_result_file_SP)
ts_dpsim_SP_shifted = ts.frequency_shift_list(ts_dpsim_SP, 50)
path_DP = 'logs/' + 'DP_' + model_name + '/'
dpsim_result_file_DP = path_DP + 'DP_' + model_name + '.csv'
ts_dpsim_DP = read_timeseries_csv(dpsim_result_file_DP)
ts_dpsim_DP_shifted = ts.frequency_shift_list(ts_dpsim_DP, 50)
......@@ -160,11 +222,16 @@
plt.plot(ts_dpsim_EMT[var_name].time, np.sqrt(3/2)*ts_dpsim_EMT[var_name].values, label=var_name)
# DP
var_names = ['v1_shift', 'v2_shift']
for var_name in var_names:
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name, linestyle=':')
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name+' (DP)', linestyle='-.')
# SP
var_names = ['v1_shift', 'v2_shift']
for var_name in var_names:
plt.plot(ts_dpsim_SP_shifted[var_name].time, ts_dpsim_SP_shifted[var_name].values, label=var_name+' (SP)', linestyle=':')
plt.legend()
plt.show()
```
......@@ -183,18 +250,63 @@
plt.plot(ts_dpsim_EMT[var_name].time, np.sqrt(3/2)*ts_dpsim_EMT[var_name].values, label=var_name)
# DP
var_names = ['iR_shift', 'iL_shift']
for var_name in var_names:
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name, linestyle=':')
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name+' (DP)', linestyle=':')
# SP
var_names = ['iR_shift', 'iL_shift']
for var_name in var_names:
plt.plot(ts_dpsim_SP_shifted[var_name].time, ts_dpsim_SP_shifted[var_name].values, label=var_name+' (SP)', linestyle=':')
plt.legend()
plt.show()
```
%% Cell type:markdown id: tags:
### Comparison SP vs. DP
%% Cell type:code id: tags:
``` python
plt.figure()
for name in [('v1_shift', 'v1_shift'), ('v2_shift', 'v2_shift')]:
plt.plot(ts_dpsim_SP_shifted[name[0]].time, ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values, label=name[0]+' (SP) vs. '+name[1]+' (DP)')
plt.legend()
```
%% Cell type:code id: tags:
``` python
plt.figure()
for name in [('iR_shift', 'iR_shift'), ('iL_shift', 'iL_shift')]:
plt.plot(ts_dpsim_SP_shifted[name[0]].time, ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values, label=name[0]+' (SP) vs. '+name[1]+' (DP)')
plt.legend()
```
%% Cell type:markdown id: tags:
## Assertion SP vs. DP
%% Cell type:code id: tags:
``` python
compare_errors_abs = []
compare_errors_rel = []
for name in [('v1_shift', 'v1_shift'), ('v2_shift', 'v2_shift'), ('iR_shift', 'iR_shift'), ('iL_shift', 'iL_shift')]:
compare_errors_abs.append(np.absolute(ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values).max())
compare_errors_rel.append(np.absolute(ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values).max()/ts_dpsim_DP_shifted[name[1]].values.max())
print(name[0]+' vs. '+name[1] + ' (abs): ' + str(compare_errors_abs[-1]))
print(name[0]+' vs. '+name[1] + ' (rel): ' + str(compare_errors_rel[-1]))
print('Max rel error: '+ '{:.2}'.format(np.max(compare_errors_rel)*100) +'%')
assert np.max(compare_errors_rel) < 3e-1
```
%% Cell type:markdown id: tags:
### Comparison DP vs. EMT
%% Cell type:code id: tags:
``` python
......@@ -238,10 +350,15 @@
%% Cell type:code id: tags:
``` python
model_name = 'VoltageSource_Capacitor'
path_SP = 'logs/' + 'SP_' + model_name + '/'
dpsim_result_file_SP = path_SP + 'SP_' + model_name + '.csv'
ts_dpsim_SP = read_timeseries_csv(dpsim_result_file_SP)
ts_dpsim_SP_shifted = ts.frequency_shift_list(ts_dpsim_SP, 50)
path_DP = 'logs/' + 'DP_' + model_name + '/'
dpsim_result_file_DP = path_DP + 'DP_' + model_name + '.csv'
ts_dpsim_DP = read_timeseries_csv(dpsim_result_file_DP)
ts_dpsim_DP_shifted = ts.frequency_shift_list(ts_dpsim_DP, 50)
......@@ -265,11 +382,16 @@
plt.plot(ts_dpsim_EMT[var_name].time, np.sqrt(3/2)*ts_dpsim_EMT[var_name].values, label=var_name)
# DP
var_names = ['v1_shift', 'v2_shift']
for var_name in var_names:
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name, linestyle=':')
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name + ' (DP)', linestyle='-.')
# SP
var_names = ['v1_shift', 'v2_shift']
for var_name in var_names:
plt.plot(ts_dpsim_SP_shifted[var_name].time, ts_dpsim_SP_shifted[var_name].values, label=var_name + ' (SP)', linestyle=':')
plt.legend()
plt.show()
```
......@@ -288,18 +410,63 @@
plt.plot(ts_dpsim_EMT[var_name].time, np.sqrt(3/2)*ts_dpsim_EMT[var_name].values, label=var_name)
# DP
var_names = ['iR_shift', 'iC_shift']
for var_name in var_names:
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name, linestyle=':')
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name + ' (DP)', linestyle=':')
# SP
var_names = ['iR_shift', 'iC_shift']
for var_name in var_names:
plt.plot(ts_dpsim_DP_shifted[var_name].time, ts_dpsim_DP_shifted[var_name].values, label=var_name + ' (SP)', linestyle=':')
plt.legend()
plt.show()
```
%% Cell type:markdown id: tags:
### Comparison SP vs. DP
%% Cell type:code id: tags:
``` python
plt.figure()
for name in [('v1_shift', 'v1_shift'), ('v2_shift', 'v2_shift')]:
plt.plot(ts_dpsim_SP_shifted[name[0]].time, ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values, label=name[0]+' (SP) vs. '+name[1]+' (DP)')
plt.legend()
```
%% Cell type:code id: tags:
``` python
plt.figure()
for name in [('iR_shift', 'iR_shift'), ('iC_shift', 'iC_shift')]:
plt.plot(ts_dpsim_SP_shifted[name[0]].time, ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values, label=name[0]+' (SP) vs. '+name[1]+' (DP)')
plt.legend()
```
%% Cell type:markdown id: tags:
### Assertion SP vs. DP
%% Cell type:code id: tags:
``` python
compare_errors_abs = []
compare_errors_rel = []
for name in [('v1_shift', 'v1_shift'), ('v2_shift', 'v2_shift'), ('iR_shift', 'iR_shift'), ('iC_shift', 'iC_shift')]:
compare_errors_abs.append(np.absolute(ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values).max())
compare_errors_rel.append(np.absolute(ts_dpsim_SP_shifted[name[0]].values - ts_dpsim_DP_shifted[name[1]].values).max()/ts_dpsim_DP_shifted[name[1]].values.max())
print(name[0]+' vs. '+name[1] + ' (abs): ' + str(compare_errors_abs[-1]))
print(name[0]+' vs. '+name[1] + ' (rel): ' + str(compare_errors_rel[-1]))
print('Max rel error: '+ '{:.2}'.format(np.max(compare_errors_rel)*100) +'%')
assert np.max(compare_errors_rel) < 6e-1
```
%% Cell type:markdown id: tags:
### Comparison DP vs. EMT
%% Cell type:code id: tags:
``` python
......
......@@ -68,6 +68,8 @@ void SP::Ph1::Resistor::initializeFromNodesAndTerminals(Real frequency) {
mIntfVoltage(0, 0) = initialSingleVoltage(1) - initialSingleVoltage(0);
mIntfCurrent = mConductance*mIntfVoltage;
mSLog->info("\nResistance [Ohm]: {:s}",
Logger::realToString(mResistance));
mSLog->info(
"\n--- Initialization from powerflow ---"
"\nVoltage across: {:s}"
......@@ -95,29 +97,29 @@ void SP::Ph1::Resistor::mnaInitialize(Real omega, Real timeStep, Attribute<Matri
}
void SP::Ph1::Resistor::mnaApplySystemMatrixStamp(Matrix& systemMatrix) {
// Set diagonal entries
if (terminalNotGrounded(0))
Math::addToMatrixElement(systemMatrix, matrixNodeIndices(0), matrixNodeIndices(0), mConductance);
if (terminalNotGrounded(1))
Math::addToMatrixElement(systemMatrix, matrixNodeIndices(1), matrixNodeIndices(1), mConductance);
// Set off diagonal entries
if (terminalNotGrounded(0) && terminalNotGrounded(1)) {
Math::addToMatrixElement(systemMatrix, matrixNodeIndices(0), matrixNodeIndices(1), -mConductance);
Math::addToMatrixElement(systemMatrix, matrixNodeIndices(1), matrixNodeIndices(0), -mConductance);
}
mSLog->info("-- Matrix Stamp ---");
if (terminalNotGrounded(0))
mSLog->info("Add {:e} to system at ({:d},{:d})",
mConductance, matrixNodeIndex(0), matrixNodeIndex(0));
if (terminalNotGrounded(1))
mSLog->info("Add {:e} to system at ({:d},{:d})",