Commit a8434448 authored by Jan Dinkelbach's avatar Jan Dinkelbach Committed by Markus Mirz
Browse files

pfsolver: allow vd and pv comps at same bus using vd as default

parent 7c60d93b
......@@ -164,10 +164,16 @@ void PFSolver::determinePFBusType() {
else if (connectedPV && connectedPQ && !connectedVD) {
mPVBusIndices.push_back(node->simNode());
mPVBuses.push_back(node);
mSLog->info("Note: node with uuid {} set as PV bus. Both PV and PQ type components were connected.", node->attribute<String>("uid")->get());
} // only VD type component connected -> set as VD bus
else if (!connectedPV && !connectedPQ && connectedVD) {
mVDBusIndices.push_back(node->simNode());
mVDBuses.push_back(node);
} // VD and PV type component connect -> set as VD bus
else if (connectedPV && !connectedPQ && connectedVD) {
mVDBusIndices.push_back(node->simNode());
mVDBuses.push_back(node);
mSLog->info("Note: node with uuid {} set as VD bus. Both VD and PV type components were connected.", node->attribute<String>("uid")->get());
}
else {
std::stringstream ss;
......
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