Commit 9a22eef8 authored by Steffen Vogel's avatar Steffen Vogel 🎅🏼
Browse files

Merge branch 'development' of git.rwth-aachen.de:acs/core/simulation/dpsim into development

parents 05a3bf03 5c5afa05
Subproject commit db41a6bca159af3bf9ec7b2f7387d5071ef329f7
Subproject commit c9da9fe3ebe944491836fe2722e57d27e1fa921d
......@@ -13,18 +13,20 @@ set(CIRCUIT_SOURCES
Circuits/DP_IdealVS_RL1.cpp
Circuits/DP_IdealVS_RC1.cpp
Circuits/DP_CS_R2CL.cpp
Circuits/DP_IdealVS_CS_R4.cpp
Circuits/DP_IdealVS_CS_R4_1a.cpp
Circuits/DP_IdealVS_CS_R4_1b.cpp
Circuits/DP_IdealVS_R2L3.cpp
Circuits/EMT_CS_R_1.cpp
Circuits/EMT_IdealVS_RL1.cpp
Circuits/EMT_CS_R2CL.cpp
Circuits/EMT_IdealVS_R2L3.cpp
Circuits/EMT_IdealVS_CS_R4.cpp
Circuits/DP_IdealVS_RXLine_1.cpp
Circuits/DP_IdealVS_Trafo_1.cpp
# Circuits/DP_ResVS_RL_Switch_1.cpp
Circuits/EMT_IdealVS_R_1.cpp
# Circuits/EMT_ResVS_RL_Switch_1.cpp
Circuits/EMT_IdealVS_CS_R4_1a.cpp
Circuits/EMT_IdealVS_CS_R4_1b.cpp
#Circuits/DP_IdealVS_RXLine_1.cpp
#Circuits/DP_IdealVS_Trafo_1.cpp
#Circuits/DP_ResVS_RL_Switch_1.cpp
#Circuits/EMT_IdealVS_R_1.cpp
#Circuits/EMT_ResVS_RL_Switch_1.cpp
)
set(SYNCGEN_SOURCES
......
......@@ -54,7 +54,7 @@ int main(int argc, char* argv[]) {
auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{cs, r1, c1, l1, r2});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "DP_CS_R2CL";
......
......@@ -44,7 +44,7 @@ int main(int argc, char* argv[]) {
auto sys = SystemTopology(50, SystemNodeList{n1}, SystemComponentList{cs, r1});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "DP_CS_R_1";
......
......@@ -33,26 +33,24 @@ int main(int argc, char* argv[]) {
// Components
auto vs = VoltageSource::make("vs");
auto r1 = Resistor::make("r_1");
auto r2 = Resistor::make("r_2");
auto r3 = Resistor::make("r_3");
auto r4 = Resistor::make("r_4");
auto cs = CurrentSource::make("cs");
// Topology
vs->connect({ Node::GND, n1 });
r1->connect({ n1, n2 });
r2->connect({ n2, Node::GND });
r3->connect({ n2, n3 });
r4->connect({ n3, Node::GND });
cs->connect({ Node::GND, n3 });
vs->setParameters(10);
vs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1");
r1->setParameters(1);
r1->connect(Node::List{ n1, n2 });
auto r2 = Resistor::make("r_2", Logger::Level::DEBUG);
r2->setParameters(1);
r2->connect(Node::List{ n2, Node::GND });
auto r3 = Resistor::make("r_3");
r3->setParameters(10);
r3->connect(Node::List{ n2, n3 });
auto r4 = Resistor::make("r_4");
r4->setParameters(5);
r4->connect(Node::List{ n3, Node::GND });
auto cs = CurrentSource::make("cs");
cs->setParameters(1);
cs->connect(Node::List{ Node::GND, n3 });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, SystemComponentList{vs, r1, r2, r3, r4, cs});
......@@ -60,7 +58,7 @@ int main(int argc, char* argv[]) {
// Define simulation scenario
Real timeStep = 0.001;
Real finalTime = 0.1;
String simName = "DP_IdealVS_CS_R4";
String simName = "DP_IdealVS_CS_R4_1a";
Simulation sim(simName, sys, timeStep, finalTime);
sim.run();
......
/** Reference Circuits
*
* @author Markus Mirz <mmirz@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
*
* DPsim
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*********************************************************************************/
#include "DPsim.h"
using namespace DPsim;
using namespace CPS::DP;
using namespace CPS::DP::Ph1;
int main(int argc, char* argv[]) {
// Nodes
auto n1 = Node::make("n1");
auto n2 = Node::make("n2");
auto n3 = Node::make("n3");
// Components
auto vs = VoltageSource::make("vs");
vs->setParameters(10);
vs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1");
r1->setParameters(1);
r1->connect(Node::List{ n1, n2 });
auto r2 = Resistor::make("r_2", Logger::Level::DEBUG);
r2->setParameters(1);
r2->connect(Node::List{ n2, Node::GND });
auto r3 = Resistor::make("r_3");
r3->setParameters(10);
r3->connect(Node::List{ n2, n3 });
auto r4 = Resistor::make("r_4");
r4->setParameters(5);
r4->connect(Node::List{ n3, Node::GND });
auto cs = CurrentSource::make("cs");
cs->setParameters(1);
cs->connect(Node::List{ Node::GND, n3 });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, SystemComponentList{vs, r1, r2, r3, r4, cs});
// Define simulation scenario
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "DP_IdealVS_CS_R4_1b";
Simulation sim(simName, sys, timeStep, finalTime);
sim.run();
return 0;
}
......@@ -34,32 +34,29 @@ int main(int argc, char* argv[]) {
// Components
auto vs = VoltageSource::make("vs");
vs->setParameters(10);
vs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1");
auto l1 = Inductor::make("l_1");
auto l2 = Inductor::make("l_2");
auto l3 = Inductor::make("l_3");
auto r2 = Resistor::make("r_2");
// Topology
vs->connect({ Node::GND, n1 });
r1->connect({ n1, n2 });
l1->connect({ n2, n3 });
l2->connect({ n3, Node::GND });
l3->connect({ n3, n4 });
r2->connect({ n4, Node::GND });
vs->setParameters(10 * sin(2 * PI * 50)); //V_in(t) = 10*sin(w*t)
r1->setParameters(1);
r1->connect(Node::List{ n1, n2 });
auto l1 = Inductor::make("l_1");
l1->setParameters(0.02);
l1->connect(Node::List{ n2, n3 });
auto l2 = Inductor::make("l_2");
l2->setParameters(0.1);
l2->connect(Node::List{ n3, Node::GND });
auto l3 = Inductor::make("l_3");
l3->setParameters(0.05);
l3->connect(Node::List{ n3, n4 });
auto r2 = Resistor::make("r_2");
r2->setParameters(2);
r2->connect(Node::List{ n4, Node::GND });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3, n4}, SystemComponentList{vs, r1, l1, l2, l3, r2});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "DP_IdealVS_R2L3";
......
......@@ -32,27 +32,34 @@ int main(int argc, char* argv[]) {
// Components
auto vs = VoltageSource::make("vs");
auto r1 = Resistor::make("r_1");
auto l1 = Inductor::make("l_1");
vs->setParameters(Complex(10, 0));
vs->connect(Node::List{ Node::GND, n1 });
// Topology
vs->connect({ Node::GND, n1 });
r1->connect({ n1, n2 });
l1->connect({ n2, Node::GND });
auto r1 = Resistor::make("r_1");
r1->setParameters(5);
r1->connect(Node::List{ n1, n2 });
vs->setParameters(Complex(10, 0));
r1->setParameters(1);
l1->setParameters(1);
auto l1 = Inductor::make("l_1");
l1->setParameters(0.02);
l1->connect(Node::List{ n2, Node::GND });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{vs, r1, l1});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "DP_IdealVS_RL1";
// Logger
auto logger = DataLogger::make(simName);
logger->addAttribute("v1", n1->attribute("voltage"));
logger->addAttribute("v2", n2->attribute("voltage"));
logger->addAttribute("i1", r1->attribute("i_comp"));
Simulation sim(simName, sys, timeStep, finalTime);
sim.addLogger(logger);
sim.run();
return 0;
......
......@@ -32,30 +32,26 @@ int main(int argc, char* argv[]) {
// Components
auto cs = CurrentSource::make("cs");
cs->setParameters(10, 50);
cs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1");
auto c1 = Capacitor::make("c_1");
auto l1 = Inductor::make("l_1");
auto r2 = Resistor::make("r_2");
// Topology
cs->connect({ Node::GND, n1 });
r1->connect({ n1, Node::GND });
c1->connect({ n1, n2 });
l1->connect({ n2, Node::GND });
r2->connect({ n2, Node::GND });
// Parameters
cs->setParameters(10);
r1->setParameters(1);
r1->connect(Node::List{ n1, Node::GND });
auto c1 = Capacitor::make("c_1");
c1->setParameters(0.001);
c1->connect(Node::List{ n1, n2 });
auto l1 = Inductor::make("l_1");
l1->setParameters(0.001);
l1->connect(Node::List{ n2, Node::GND });
auto r2 = Resistor::make("r_2");
r2->setParameters(1);
r2->connect(Node::List{ n2, Node::GND });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{cs, r1, c1, l1, r2});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "EMT_CS_R2CL";
......
......@@ -31,21 +31,17 @@ int main(int argc, char* argv[]) {
// Components
auto cs = CurrentSource::make("cs");
cs->setParameters(Complex(10, 0), 50);
cs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1");
// Topology
cs->connect({ Node::GND, n1 });
r1->connect({ Node::GND, n1 });
// Parameters
cs->setParameters(Complex(10, 0));
r1->setParameters(1);
r1->connect({ Node::GND, n1 });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1}, SystemComponentList{cs, r1});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "EMT_CS_R_1";
......
......@@ -33,27 +33,23 @@ int main(int argc, char* argv[]) {
// Components
auto vs = VoltageSource::make("vs");
auto r1 = Resistor::make("r_1");
auto r2 = Resistor::make("r_2");
auto r3 = Resistor::make("r_3");
auto r4 = Resistor::make("r_4");
auto cs = CurrentSource::make("cs");
// Topology
vs->connect({ Node::GND, n1 });
r1->connect({ n1, n2 });
r2->connect({ n2, Node::GND });
r3->connect({ n2, n3 });
r4->connect({ n3, Node::GND });
cs->connect({ Node::GND, n3 });
// Parameters
vs->setParameters(10);
vs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1", Logger::Level::DEBUG);
r1->setParameters(1);
r1->connect(Node::List{ n1, n2 });
auto r2 = Resistor::make("r_2");
r2->setParameters(1);
r2->connect(Node::List{ n2, Node::GND });
auto r3 = Resistor::make("r_3");
r3->setParameters(10);
r3->connect(Node::List{ n2, n3 });
auto r4 = Resistor::make("r_4");
r4->setParameters(5);
r4->connect(Node::List{ n3, Node::GND });
auto cs = CurrentSource::make("cs");
cs->setParameters(1);
cs->connect(Node::List{ Node::GND, n3 });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, SystemComponentList{vs, r1, r2, r3, r4, cs});
......@@ -61,7 +57,7 @@ int main(int argc, char* argv[]) {
// Define simulation scenario
Real timeStep = 0.001;
Real finalTime = 0.1;
String simName = "EMT_IdealVS_CS_R4";
String simName = "EMT_IdealVS_CS_R4_1a";
Simulation sim(simName, sys, timeStep, finalTime, Domain::EMT);
sim.run();
......
/** Reference Circuits
*
* @author Markus Mirz <mmirz@eonerc.rwth-aachen.de>
* @copyright 2017-2018, Institute for Automation of Complex Power Systems, EONERC
*
* DPsim
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*********************************************************************************/
#include "DPsim.h"
using namespace DPsim;
using namespace CPS::EMT;
using namespace CPS::EMT::Ph1;
int main(int argc, char* argv[]) {
// Nodes
auto n1 = Node::make("n1");
auto n2 = Node::make("n2");
auto n3 = Node::make("n3");
// Components
auto vs = VoltageSource::make("vs");
vs->setParameters(10, 50); // 10 * Complex(cos(phi), sin(phi))
vs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1");
r1->setParameters(1);
r1->connect(Node::List{ n1, n2 });
auto r2 = Resistor::make("r_2");
r2->setParameters(1);
r2->connect(Node::List{ n2, Node::GND });
auto r3 = Resistor::make("r_3");
r3->setParameters(10);
r3->connect(Node::List{ n2, n3 });
auto r4 = Resistor::make("r_4");
r4->setParameters(5);
r4->connect(Node::List{ n3, Node::GND });
auto cs = CurrentSource::make("cs");
cs->setParameters(1, 50);
cs->connect(Node::List{ Node::GND, n3 });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, SystemComponentList{vs, r1, r2, r3, r4, cs});
// Define simulation scenario
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "EMT_IdealVS_CS_R4_1b";
Simulation sim(simName, sys, timeStep, finalTime, Domain::EMT);
sim.run();
return 0;
}
......@@ -34,33 +34,29 @@ int main(int argc, char* argv[]) {
// Components
auto vs = VoltageSource::make("vs");
vs->setParameters(10, 50);
vs->connect(Node::List{ Node::GND, n1 });
auto r1 = Resistor::make("r_1");
auto l1 = Inductor::make("l_1");
auto l2 = Inductor::make("l_2");
auto l3 = Inductor::make("l_3");
auto r2 = Resistor::make("r_2");
// Topology
vs->connect({ Node::GND, n1 });
r1->connect({ n1, n2 });
l1->connect({ n2, n3 });
l2->connect({ n3, Node::GND });
l3->connect({ n3, n4 });
r2->connect({ n4, Node::GND });
// Parameters
vs->setParameters(10 * sin(2 * PI * 50)); //V_in(t) = 10*sin(w*t)
r1->setParameters(1);
r1->connect(Node::List{ n1, n2 });
auto l1 = Inductor::make("l_1");
l1->setParameters(0.02);
l1->connect(Node::List{ n2, n3 });
auto l2 = Inductor::make("l_2");
l2->setParameters(0.1);
l2->connect(Node::List{ n3, Node::GND });
auto l3 = Inductor::make("l_3");
l3->setParameters(0.05);
l3->connect(Node::List{ n3, n4 });
auto r2 = Resistor::make("r_2");
r2->setParameters(2);
r2->connect(Node::List{ n4, Node::GND });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3, n4}, SystemComponentList{vs, r1, l1, l2, l3, r2});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "EMT_IdealVS_R2L3";
......
......@@ -32,28 +32,34 @@ int main(int argc, char* argv[]) {
// Components
auto vs = VoltageSource::make("vs");
auto r1 = Resistor::make("r_1");
auto l1 = Inductor::make("l_1");
vs->setParameters(Complex(10, 0), 50);
vs->connect(Node::List{ Node::GND, n1 });
// Topology
vs->connect({ Node::GND, n1 });
r1->connect({ n1, n2 });
l1->connect({ n2, Node::GND });
auto r1 = Resistor::make("r_1");
r1->setParameters(5);
r1->connect(Node::List{ n1, n2 });
// Parameters
vs->setParameters(Complex(10, 0));
r1->setParameters(1);
l1->setParameters(1);
auto l1 = Inductor::make("l_1");
l1->setParameters(0.02);
l1->connect(Node::List{ n2, Node::GND });
// Define system topology
auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{vs, r1, l1});
// Define simulation scenario
Real timeStep = 0.001;
Real timeStep = 0.0001;
Real finalTime = 0.1;
String simName = "EMT_IdealVS_RL1";
// Logger
auto logger = DataLogger::make(simName);
logger->addAttribute("v1", n1->attribute("voltage"));
logger->addAttribute("v2", n2->attribute("voltage"));
logger->addAttribute("i1", r1->attribute("i_comp"));
Simulation sim(simName, sys, timeStep, finalTime, Domain::EMT);
sim.addLogger(logger);
sim.run();
return 0;
......
......@@ -3,7 +3,7 @@ import dpsim
PATH = os.path.dirname(__file__)
def test_circuit():
def no_test_circuit():
# Nodes
gnd = dpsim.dp.Node.GND()
n1 = dpsim.dp.Node("n1")
......
......@@ -3,7 +3,7 @@ import datetime as dt
from dpsim.Event import Event
def test_realtime():
def no_test_realtime():
# Nodes
gnd = dpsim.dp.Node.GND()
n1 = dpsim.dp.Node("n1")
......
......@@ -4,7 +4,7 @@ import logging
from dpsim.Event import Event
def test_simulation():
def no_test_simulation():
logging.getLogger().setLevel(logging.DEBUG)
logging.info("hello\n")
......
......@@ -4,7 +4,7 @@ import logging
from dpsim.Event import Event
def test_simulation():
def no_test_simulation():
logging.getLogger().setLevel(logging.DEBUG)
logging.info("hello\n")
......
......@@ -135,6 +135,8 @@ namespace DPsim {
void addInterface(Interface *eint, Bool sync = true) {
addInterface(eint, sync, sync);
}
std::vector<InterfaceMapping> & interfaces() { return mInterfaces; }