Commit 2d9dd0df authored by Steffen Vogel's avatar Steffen Vogel 🎅🏼
Browse files

examples: fix attribute names

Former-commit-id: f86f0520
parent c81621ec
......@@ -51,7 +51,7 @@ int main(int argc, char *argv[]) {
ecs->connect({ Node::GND, n1 });
r1->connect({ Node::GND, n1 });
intf.addImport(ecs->attribute<Complex>("i_ref"), 0);
intf.addImport(ecs->attribute<Complex>("I_ref"), 0);
intf.addExport(ecs->attribute<Complex>("v_comp"), 0);
auto sys = SystemTopology(50, SystemNodeList{n1}, SystemComponentList{ecs, r1});
......
......@@ -76,7 +76,7 @@ int main(int argc, char *argv[]) {
vs1->connect({ Node::GND, n1 });
r01->connect({ n1, n2 });
intf.addImport(evs->attribute<Complex>("v_ref"), 0);
intf.addImport(evs->attribute<Complex>("V_ref"), 0);
intf.addExport(evs->attribute<Complex>("i_comp"), 0);
auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{evs, vs1, r01});
......@@ -99,7 +99,7 @@ int main(int argc, char *argv[]) {
//auto ecs_switch = CurrentSource::make("i_switch", GND, 1, Complex(0, 0));
//auto r01 = Resistor::make("r_0_1", 0, 1, 1);
intf.addImport(ecs->attribute<Complex>("i_ref"), 0);
intf.addImport(ecs->attribute<Complex>("I_ref"), 0);
intf.addExport(ecs->attribute<Complex>("v_comp"), 0);
//intf.addImport(ecs_switch->attribute('CurrentRef'), 1);
......
......@@ -80,7 +80,7 @@ int main(int argc, char *argv[])
comps = SystemComponentList{evs, vs, l1, r1};
nodes = SystemNodeList{Node::GND, n1, n2, n3};
intf.addImport(evs->attribute<Complex>("v_ref"), 0);
intf.addImport(evs->attribute<Complex>("V_ref"), 0);
intf.addExport(evs->attribute<Complex>("i_comp"), 0);
}
else if (String(argv[1]) == "1") {
......@@ -109,7 +109,7 @@ int main(int argc, char *argv[])
comps = SystemComponentList{ecs, sw, r2A, r2B};
nodes = SystemNodeList{Node::GND, n4, n5};
intf.addImport(ecs->attribute<Complex>("i_ref"), 0);
intf.addImport(ecs->attribute<Complex>("I_ref"), 0);
intf.addExport(ecs->attribute<Complex>("v_comp"), 0);
}
else {
......
......@@ -60,7 +60,7 @@ int main(int argc, char* argv[])
auto sys = SystemTopology(50, SystemNodeList{Node::GND, n1, n2, n3, n4}, SystemComponentList{evs, rs, rl, ll, rL});
auto intf = Interface("/villas1-in", "/villas1-out");
intf.addImport(evs->attribute<Complex>("v_ref"), 0);
intf.addImport(evs->attribute<Complex>("V_ref"), 0);
intf.addExport(evs->attribute<Complex>("i_comp"), 0);
Real timeStep = 0.001;
......
......@@ -64,7 +64,7 @@ int main(int argc, char* argv[])
auto intf = Interface("/villas1-in", "/villas1-out", &conf);
intf.addImport(evs->attribute<Complex>("v_ref"), 0);
intf.addImport(evs->attribute<Complex>("V_ref"), 0);
intf.addExport(evs->attribute<Complex>("i_comp"), 0);
Real timeStep = 0.001;
......
......@@ -93,7 +93,7 @@ int main(int argc, char *argv[]) {
sys.mComponents.push_back(filtP_profile);
// Register interface current source and voltage drop
intf1.addImport(ecs->attribute<Complex>("i_ref"), 0);
intf1.addImport(ecs->attribute<Complex>("I_ref"), 0);
intf1.addExport(ecs->attribute<Complex>("v_comp"), 0);
// TODO: gain by 20e8
......@@ -166,7 +166,7 @@ int main(int argc, char *argv[]) {
// Register voltage source reference and current flowing through source
// multiply with -1 to consider passive sign convention
intf1.addImport(evs->attribute<Complex>("v_ref"), 0);
intf1.addImport(evs->attribute<Complex>("V_ref"), 0);
// TODO: invalid sign
intf1.addExport(evs->attribute<Complex>("i_comp"), 0);
......
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