DP_Circuits.cpp 11.5 KB
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/* Copyright 2017-2020 Institute for Automation of Complex Power Systems,
 *                     EONERC, RWTH Aachen University
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 * This Source Code Form is subject to the terms of the Mozilla Public
 * License, v. 2.0. If a copy of the MPL was not distributed with this
 * file, You can obtain one at https://mozilla.org/MPL/2.0/.
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 *********************************************************************************/

#include <DPsim.h>

using namespace DPsim;
using namespace CPS::DP;

void DP_CS_R1() {
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_CS_R1";
	Logger::setLogDir("logs/"+simName);

	// Nodes
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	auto n1 = SimNode::make("n1");
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	// Components
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	auto cs = Ph1::CurrentSource::make("cs");
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	cs->setParameters(Complex(10, 0));
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	auto r1 = Ph1::Resistor::make("r_1");
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	r1->setParameters(1);

	// Topology
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	cs->connect({ SimNode::GND, n1 });
	r1->connect({ SimNode::GND, n1 });
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	auto sys = SystemTopology(50, SystemNodeList{n1}, SystemComponentList{cs, r1});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("i10", r1->attribute("i_intf"));

	Simulation sim(simName, sys, timeStep, finalTime, Domain::DP, Solver::Type::MNA, Logger::Level::debug);
	sim.addLogger(logger);

	sim.run();
}

void DP_VS_R1() {
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_VS_R1";
	Logger::setLogDir("logs/"+simName);

	// Nodes
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	auto n1 = SimNode::make("n1");
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	// Components
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	auto vs = Ph1::VoltageSource::make("v_1");
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	vs->setParameters(Complex(10, 0));
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	auto r = Ph1::Resistor::make("r_1");
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	r->setParameters(1);

	// Topology
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	vs->connect({SimNode::GND, n1});
	r->connect({n1, SimNode::GND});
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	auto sys = SystemTopology(50, SystemNodeList{n1}, SystemComponentList{vs, r});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));

	Simulation sim(simName, sys, timeStep, finalTime);
	sim.addLogger(logger);

	sim.run();
}

void DP_CS_R2CL() {
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_CS_R2CL";
	Logger::setLogDir("logs/"+simName);

	// Nodes
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	auto n1 = SimNode::make("n1");
	auto n2 = SimNode::make("n2");
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	// Components
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	auto cs = Ph1::CurrentSource::make("cs");
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	cs->setParameters(10);
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	auto r1 = Ph1::Resistor::make("r_1");
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	r1->setParameters(1);
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	auto c1 = Ph1::Capacitor::make("c_1");
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	c1->setParameters(0.001);
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	auto l1 = Ph1::Inductor::make("l_1");
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	l1->setParameters(0.001);
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	auto r2 = Ph1::Resistor::make("r_2");
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	r2->setParameters(1);

	// Topology
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	cs->connect({ SimNode::GND, n1 });
	r1->connect({ n1, SimNode::GND });
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	c1->connect({ n1, n2 });
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	l1->connect({ n2, SimNode::GND });
	r2->connect({ n2, SimNode::GND });
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	auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{cs, r1, c1, l1, r2});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("v2", n2->attribute("v"));
	logger->addAttribute("i12", cs->attribute("i_intf"));
	logger->addAttribute("i34", c1->attribute("i_intf"));

	Simulation sim(simName, sys, timeStep, finalTime);
	sim.addLogger(logger);

	sim.run();
}

void DP_VS_CS_R4() {
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_VS_CS_R4";
	Logger::setLogDir("logs/"+simName);

	// Nodes
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	auto n1 = SimNode::make("n1");
	auto n2 = SimNode::make("n2");
	auto n3 = SimNode::make("n3");
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	// Components
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	auto vs = Ph1::VoltageSource::make("vs");
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	vs->setParameters(10);
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	auto r1 = Ph1::Resistor::make("r_1");
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	r1->setParameters(1);
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	auto r2 = Ph1::Resistor::make("r_2", Logger::Level::debug);
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	r2->setParameters(1);
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	auto r3 = Ph1::Resistor::make("r_3");
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	r3->setParameters(10);
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	auto r4 = Ph1::Resistor::make("r_4");
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	r4->setParameters(5);
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	auto cs = Ph1::CurrentSource::make("cs");
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	cs->setParameters(1);

	// Topology
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	vs->connect(SimNode::List{ SimNode::GND, n1 });
	r1->connect(SimNode::List{ n1, n2 });
	r2->connect(SimNode::List{ n2, SimNode::GND });
	r3->connect(SimNode::List{ n2, n3 });
	r4->connect(SimNode::List{ n3, SimNode::GND });
	cs->connect(SimNode::List{ SimNode::GND, n3 });
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	// Define system topology
	auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, SystemComponentList{vs, r1, r2, r3, r4, cs});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("v2", n2->attribute("v"));
	logger->addAttribute("v3", n3->attribute("v"));
	logger->addAttribute("i12", r1->attribute("i_intf"));
	logger->addAttribute("i23", r3->attribute("i_intf"));

	Simulation sim(simName, sys, timeStep, finalTime);
	sim.addLogger(logger);

	sim.run();
}

void DP_VS_R2L3() {
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_VS_R2L3";
	Logger::setLogDir("logs/"+simName);

	// Nodes
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	auto n1 = SimNode::make("n1");
	auto n2 = SimNode::make("n2");
	auto n3 = SimNode::make("n3");
	auto n4 = SimNode::make("n4");
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	// Components
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	auto vs = Ph1::VoltageSource::make("vs");
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	vs->setParameters(10);
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	auto r1 = Ph1::Resistor::make("r_1");
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	r1->setParameters(1);
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	auto l1 = Ph1::Inductor::make("l_1");
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	l1->setParameters(0.02);
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	auto l2 = Ph1::Inductor::make("l_2");
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	l2->setParameters(0.1);
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	auto l3 = Ph1::Inductor::make("l_3");
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	l3->setParameters(0.05);
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	auto r2 = Ph1::Resistor::make("r_2");
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	r2->setParameters(2);

	// Topology
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	vs->connect(SimNode::List{ SimNode::GND, n1 });
	r1->connect(SimNode::List{ n1, n2 });
	l1->connect(SimNode::List{ n2, n3 });
	l2->connect(SimNode::List{ n3, SimNode::GND });
	l3->connect(SimNode::List{ n3, n4 });
	r2->connect(SimNode::List{ n4, SimNode::GND });
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	auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3, n4}, SystemComponentList{vs, r1, l1, l2, l3, r2});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("v2", n2->attribute("v"));
	logger->addAttribute("v3", n3->attribute("v"));
	logger->addAttribute("v4", n4->attribute("v"));
	logger->addAttribute("i12", r1->attribute("i_intf"));
	logger->addAttribute("i34", l3->attribute("i_intf"));

	Simulation sim(simName, sys, timeStep, finalTime);
	sim.addLogger(logger);

	sim.run();
}

void DP_VS_RC1() {
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_VS_RC1";
	Logger::setLogDir("logs/"+simName);

	// Nodes
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	auto n1 = SimNode::make("n1");
	auto n2 = SimNode::make("n2");
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	// Components
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	auto vs = Ph1::VoltageSource::make("vs", Logger::Level::debug);
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	vs->setParameters(Complex(10, 0));
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	auto r1 = Ph1::Resistor::make("r_1", Logger::Level::debug);
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	r1->setParameters(1);
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	auto c1 = Ph1::Capacitor::make("c_1", Logger::Level::debug);
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	c1->setParameters(0.001);

	// Topology
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	vs->connect({ SimNode::GND, n1 });
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	r1->connect({ n1, n2 });
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	c1->connect({ n2, SimNode::GND });
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	auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{vs, r1, c1});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("v2", n2->attribute("v"));
	logger->addAttribute("i12", r1->attribute("i_intf"));

	Simulation sim(simName, sys, timeStep, finalTime);
	sim.addLogger(logger);

	sim.run();
}

void DP_VS_RL2() {
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_VS_RL2";
	Logger::setLogDir("logs/"+simName);

	// Nodes
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	auto n1 = SimNode::make("n1");
	auto n2 = SimNode::make("n2");
	auto n3 = SimNode::make("n3");
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	// Components
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	auto vs = Ph1::VoltageSource::make("v_s");
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	vs->setParameters(Complex(1000, 0));
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	auto rl = Ph1::Resistor::make("r_line");
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	rl->setParameters(1);
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	auto ll = Ph1::Inductor::make("l_line");
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	ll->setParameters(0.01);
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	auto rL = Ph1::Resistor::make("r_load");
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	rL->setParameters(100);

	// Topology
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	vs->connect({ SimNode::GND, n1 });
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	rl->connect({ n1, n2 });
	ll->connect({ n2, n3 });
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	rL->connect({ SimNode::GND, n3 });
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	// Define system topology
	auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, SystemComponentList{vs, rl, ll, rL});

	// Logger
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("v2", n2->attribute("v"));
	logger->addAttribute("i12", rL->attribute("i_intf"));

	Simulation sim(simName, sys, timeStep, finalTime, Domain::DP, Solver::Type::MNA, Logger::Level::debug);
	sim.addLogger(logger);

	sim.run();
}
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void DP_Ph3_VS_R2L3() {
	// Define simulation scenario
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_Ph3_VS_R2L3";
	Logger::setLogDir("logs/" + simName);

	// Nodes
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	auto n1 = SimNode::make("n1", PhaseType::ABC);
	auto n2 = SimNode::make("n2", PhaseType::ABC);
	auto n3 = SimNode::make("n3", PhaseType::ABC);
	auto n4 = SimNode::make("n4", PhaseType::ABC);
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	// Components
	auto vs = Ph3::VoltageSource::make("vs");
	vs->setParameters(10);
	auto r1 = Ph3::Resistor::make("r_1");
	Matrix r1_param = Matrix::Zero(3, 3);
	r1_param <<
		1., 0, 0,
		0, 1., 0,
		0, 0, 1.;
	r1->setParameters(r1_param);
	auto l1 = Ph3::Inductor::make("l_1");
	Matrix l_param = Matrix::Zero(3, 3);
	l_param <<
		1., 0, 0,
		0, 1., 0,
		0, 0, 1.;
	l1->setParameters(0.02 * l_param);
	auto l2 = Ph3::Inductor::make("l_2");
	l2->setParameters(0.1 * l_param);
	auto l3 = Ph3::Inductor::make("l_3");
	l3->setParameters(0.05 * l_param);
	auto r2 = Ph3::Resistor::make("r_2");
	r2->setParameters(2 * r1_param);

	// Topology
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	vs->connect(SimNode::List{ SimNode::GND, n1 });
	r1->connect(SimNode::List{ n1, n2 });
	l1->connect(SimNode::List{ n2, n3 });
	l2->connect(SimNode::List{ n3, SimNode::GND });
	l3->connect(SimNode::List{ n3, n4 });
	r2->connect(SimNode::List{ n4, SimNode::GND });
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	auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3, n4}, SystemComponentList{vs, r1, l1, l2, l3, r2});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("v2", n2->attribute("v"));
	logger->addAttribute("v3", n3->attribute("v"));
	logger->addAttribute("v4", n4->attribute("v"));
	logger->addAttribute("i12", r1->attribute("i_intf"));
	logger->addAttribute("i34", l3->attribute("i_intf"));


	Simulation sim(simName, Logger::Level::info);
	sim.setSystem(sys);
	sim.addLogger(logger);
	sim.setDomain(Domain::DP);
	sim.setTimeStep(timeStep);
	sim.setFinalTime(finalTime);
	sim.run();
}

void DP_Ph3_VS_RC1() {
	// Define simulation scenario
	Real timeStep = 0.0001;
	Real finalTime = 0.1;
	String simName = "DP_Ph3_VS_RC1";
	Logger::setLogDir("logs/" + simName);

	// Nodes
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	auto n1 = SimNode::make("n1", PhaseType::ABC);
	auto n2 = SimNode::make("n2", PhaseType::ABC);
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	// Components
	auto vs = Ph3::VoltageSource::make("vs");
	vs->setParameters(Complex(10, 0));
	auto r1 = Ph3::Resistor::make("r_1");
	Matrix r1_param = Matrix::Zero(3, 3);
	r1_param <<
		1., 0, 0,
		0, 1., 0,
		0, 0, 1.;
	r1->setParameters(r1_param);
	auto c1 = Ph3::Capacitor::make("c_1");
	Matrix c_param = Matrix::Zero(3, 3);
	c_param <<
		0.001, 0, 0,
		0, 0.001, 0,
		0, 0, 0.001;
	c1->setParameters(c_param);

	// Topology
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	vs->connect({ SimNode::GND, n1 });
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	r1->connect({ n1, n2 });
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	c1->connect({ n2, SimNode::GND });
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	auto sys = SystemTopology(50, SystemNodeList{n1, n2}, SystemComponentList{vs, r1, c1});

	// Logging
	auto logger = DataLogger::make(simName);
	logger->addAttribute("v1", n1->attribute("v"));
	logger->addAttribute("v2", n2->attribute("v"));
	logger->addAttribute("i12", r1->attribute("i_intf"));

	Simulation sim(simName, Logger::Level::info);
	sim.setSystem(sys);
	sim.addLogger(logger);
	sim.setDomain(Domain::DP);
	sim.setTimeStep(timeStep);
	sim.setFinalTime(finalTime);
	sim.run();
}

int main(int argc, char* argv[]) {
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	DP_CS_R1();
	DP_VS_R1();
	DP_CS_R2CL();
	DP_VS_CS_R4();
	DP_VS_R2L3();
	DP_VS_RC1();
	DP_VS_RL2();

	DP_Ph3_VS_R2L3();
	DP_Ph3_VS_RC1();
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}